When CONFIG_MIPS_FP_SUPPORT=n we don't support floating point & so don't
need to preserve floating point context for tasks. Remove that context
from struct task_struct.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxx>
---
arch/mips/include/asm/processor.h | 19 ++++++++++++++-----
arch/mips/kernel/asm-offsets.c | 7 ++++++-
2 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index ce3ed4d17813..aca909bd7841 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -255,8 +255,10 @@ struct thread_struct {
/* Saved cp0 stuff. */
unsigned long cp0_status;
+#ifdef CONFIG_MIPS_FP_SUPPORT
/* Saved fpu/fpu emulator stuff. */
struct mips_fpu_struct fpu FPU_ALIGN;
+#endif
/* Assigned branch delay slot 'emulation' frame */
atomic_t bd_emu_frame;
/* PC of the branch from a branch delay slot 'emulation' */
@@ -299,6 +301,17 @@ struct thread_struct {
#define FPAFF_INIT
#endif /* CONFIG_MIPS_MT_FPAFF */
+#ifdef CONFIG_MIPS_FP_SUPPORT
+# define FPU_INIT \
+ .fpu = { \
+ .fpr = {{{0,},},}, \
+ .fcr31 = 0, \
+ .msacsr = 0, \
+ },
+#else
+# define FPU_INIT
+#endif
+
#define INIT_THREAD { \
/* \
* Saved main processor registers \
@@ -321,11 +334,7 @@ struct thread_struct {
/* \
* Saved FPU/FPU emulator stuff \
*/ \
- .fpu = { \
- .fpr = {{{0,},},}, \
- .fcr31 = 0, \
- .msacsr = 0, \
- }, \
+ FPU_INIT \
/* \
* FPU affinity state (null if not FPAFF) \
*/ \
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index cbe4742d2fff..aebfda81120a 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -123,7 +123,6 @@ void output_thread_defines(void)
OFFSET(THREAD_REG31, task_struct, thread.reg31);
OFFSET(THREAD_STATUS, task_struct,
thread.cp0_status);
- OFFSET(THREAD_FPU, task_struct, thread.fpu);
OFFSET(THREAD_BVADDR, task_struct, \
thread.cp0_badvaddr);
@@ -135,8 +134,11 @@ void output_thread_defines(void)
BLANK();
}
+#ifdef CONFIG_MIPS_FP_SUPPORT
void output_thread_fpu_defines(void)
{
+ OFFSET(THREAD_FPU, task_struct, thread.fpu);
+
OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]);
OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]);
OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]);
@@ -174,6 +176,7 @@ void output_thread_fpu_defines(void)
OFFSET(THREAD_MSA_CSR, task_struct, thread.fpu.msacsr);
BLANK();
}
+#endif
void output_mm_defines(void)
{
@@ -341,6 +344,7 @@ void output_pm_defines(void)
}
#endif
+#ifdef CONFIG_MIPS_FP_SUPPORT
void output_kvm_defines(void)
{
COMMENT(" KVM/MIPS Specific offsets. ");
@@ -382,6 +386,7 @@ void output_kvm_defines(void)
OFFSET(VCPU_MSA_CSR, kvm_vcpu_arch, fpu.msacsr);
BLANK();
}
+#endif
#ifdef CONFIG_MIPS_CPS
void output_cps_defines(void)
--
2.19.1
