On 24/09/2018 07:49, Paul Cercueil wrote: > > Le 24 sept. 2018 07:35, Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> a > écrit : >> >> On 24/09/2018 07:24, Paul Cercueil wrote: >>> Hi Daniel, >>> >>> Le 24 sept. 2018 05:12, Daniel Lezcano >>> <daniel.lezcano@xxxxxxxxxx> a écrit : >>>> >>>> On 21/08/2018 19:16, Paul Cercueil wrote: >>>>> This driver handles the TCU (Timer Counter Unit) present on >>>>> the Ingenic JZ47xx SoCs, and provides the kernel with a >>>>> system timer, and optionally with a clocksource and a >>>>> sched_clock. >>>>> >>>>> It also provides clocks and interrupt handling to client >>>>> drivers. >>>> >>>> Can you provide a much more complete description of the timer >>>> in order to make my life easier for the review of this patch? >>> >>> See patch [03/24], it adds a doc file that describes the >>> hardware. >> >> Thanks, I went through but it is incomplete to understand what the >> timer do. I will reverse-engineer the code but it would help if you >> can give the gross approach. Why multiple channels ? mutexes and >> completion ? > > Much of the complexity is because of the multi-purpose nature of the > TCU channels. Each one can be used as timer/clocksource, or PWM. > > The driver starts by using channels 0 and 1 as system timer and > clocksource, respectively, the other ones being unused for now. Then, > *if* the PWM driver requests one of the channels in use by the > timer/clocksource driver, say channel 0, the timer/clocksource driver > will dynamically reassign the system timer to a free channel, from > channel 0 to e.g. channel 2. Only in that case the completion/mutex > are actually used. Why do you need to do this? Can't be the channels dedicated and reserved for clocksource and clockevent? -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog
