Document bindings for the Microsemi Ocelot integration of the Designware
I2C controller.
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Alexandre Belloni <alexandre.belloni@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/i2c/i2c-designware.txt | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/i2c/i2c-designware.txt b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
index fbb0a6d8b964..3e4bcc2fb6f7 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-designware.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-designware.txt
@@ -3,6 +3,7 @@
Required properties :
- compatible : should be "snps,designware-i2c"
+ or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
- reg : Offset and length of the register set for the device
- interrupts : <IRQ> where IRQ is the interrupt number.
@@ -11,8 +12,12 @@ Recommended properties :
- clock-frequency : desired I2C bus clock frequency in Hz.
Optional properties :
+ - reg : for "mscc,ocelot-i2c", a second register set to configure the SDA hold
+ time, named ICPU_CFG:TWI_DELAY in the datasheet.
+
- i2c-sda-hold-time-ns : should contain the SDA hold time in nanoseconds.
- This option is only supported in hardware blocks version 1.11a or newer.
+ This option is only supported in hardware blocks version 1.11a or newer and
+ on Microsemi SoCs ("mscc,ocelot-i2c" compatible).
- i2c-scl-falling-time-ns : should contain the SCL falling time in nanoseconds.
This value which is by default 300ns is used to compute the tLOW period.
--
2.19.0.rc1
