Le lun. 9 juil. 2018 à 19:10, Vinod <vkoul@xxxxxxxxxx> a écrit :
On 03-07-18, 14:32, Paul Cercueil wrote:
+static inline void jz4780_dma_chan_disable(struct jz4780_dma_dev
*jzdma,
+ unsigned int chn)
+{
+ if (jzdma->version == ID_JZ4770)
+ jz4780_dma_ctrl_writel(jzdma, JZ_DMA_REG_DCKEC, BIT(chn));
+}
this sounds as hardware behaviour, so why not describe as a property
in
DT?
See my response to your message on patch 1.
+
static struct jz4780_dma_desc *jz4780_dma_desc_alloc(
struct jz4780_dma_chan *jzchan, unsigned int count,
enum dma_transaction_type type)
@@ -228,8 +246,15 @@ static void jz4780_dma_desc_free(struct
virt_dma_desc *vdesc)
kfree(desc);
}
-static uint32_t jz4780_dma_transfer_size(unsigned long val,
uint32_t *shift)
+static const unsigned int jz4780_dma_ord_max[] = {
+ [ID_JZ4770] = 6,
+ [ID_JZ4780] = 7,
+};
So this gives the transfer length supported?
Yes, exactly. The maximum transfer size is (1 << ord).
--
~Vinod
