On 28/06/18 20:51, Paul Burton wrote:
Hi John,
On Mon, Jun 25, 2018 at 07:15:28PM +0200, John Crispin wrote:
From: Felix Fietkau <nbd@xxxxxxxx>
ath79_ddr_wb_flush_base has the type void __iomem *, so register offsets
need to be a multiple of 4.
Cc: Alban Bedel <albeu@xxxxxxx>
Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
Signed-off-by: Felix Fietkau <nbd@xxxxxxxx>
---
arch/mips/ath79/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This one looks like a pretty clear regression so would be good to go in
mips-fixes, but could use your SoB like many others in the series.
Thanks,
Paul
correct, its a regression, that has been there since the code was merged
and if i am not mistaken made PCI defunct.
I'll add my SoB to the whole series when sending V2 and also Cc: stable
on this one
John
