This is a note to let you know that I've just added the patch titled MIPS: io: Add barrier after register read in readX() to the 3.18-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: mips-io-add-barrier-after-register-read-in-readx.patch and it can be found in the queue-3.18 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let <stable@xxxxxxxxxxxxxxx> know about it. >From foo@baz Sun Jun 17 13:19:44 CEST 2018 From: Sinan Kaya <okaya@xxxxxxxxxxxxxx> Date: Thu, 12 Apr 2018 22:30:44 -0400 Subject: MIPS: io: Add barrier after register read in readX() From: Sinan Kaya <okaya@xxxxxxxxxxxxxx> [ Upstream commit a1cc7034e33d12dc17d13fbcd7d597d552889097 ] While a barrier is present in the writeX() functions before the register write, a similar barrier is missing in the readX() functions after the register read. This could allow memory accesses following readX() to observe stale data. Signed-off-by: Sinan Kaya <okaya@xxxxxxxxxxxxxx> Reported-by: Arnd Bergmann <arnd@xxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: Paul Burton <paul.burton@xxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Patchwork: https://patchwork.linux-mips.org/patch/19069/ [jhogan@xxxxxxxxxx: Tidy commit message] Signed-off-by: James Hogan <jhogan@xxxxxxxxxx> Signed-off-by: Sasha Levin <alexander.levin@xxxxxxxxxxxxx> Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/mips/include/asm/io.h | 2 ++ 1 file changed, 2 insertions(+) --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -375,6 +375,8 @@ static inline type pfx##read##bwlq(const BUG(); \ } \ \ + /* prevent prefetching of coherent DMA data prematurely */ \ + rmb(); \ return pfx##ioswab##bwlq(__mem, __val); \ } Patches currently in stable-queue which might be from okaya@xxxxxxxxxxxxxx are queue-3.18/mips-io-add-barrier-after-register-read-in-readx.patch