Hi Jürgen, Would you know if this R5900 bug is documented in Sony's Linux Toolkit Restriction manual or in the TX79 manual? Fredrik diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h index 2c905dbe6464..4a4f552f6885 100644 --- a/arch/mips/include/asm/r4kcache.h +++ b/arch/mips/include/asm/r4kcache.h @@ -28,7 +28,12 @@ * - We need a properly sign extended address for 64-bit code. To get away * without ifdefs we let the compiler do it by a type cast. */ +#ifdef CONFIG_CPU_R5900 +/* CPU has a bug MSB must be 0 for instruction cache. */ +#define INDEX_BASE 0 +#else #define INDEX_BASE CKSEG0 +#endif #define cache_op_s(op,addr) \ __asm__ __volatile__( \
