Arnd Bergmann <arnd@xxxxxxxx> wrote:
> - mn10300 appears to be wrong, broken by David Howells in
> commit 83c2dc15ce82 ("MN10300: Handle cacheable PCI regions
> in pci_iomap()") for any driver calling ioremap() by to get uncached
> memory,
It's not clear what the right thing to do was, given that there's an ioremap()
and an ioremap_uncached().
But the asb2305's pci_iomap() will use ioremap() (the cacheable window) if
IORESOURCE_CACHEABLE is set, but IORESOURCE_IO is not and ioremap_uncached()
otherwise.
The other supported units don't have PCI buses.
> if I understand the comment for commit 34f1bdee1910 ("mn10300: switch to
> GENERIC_PCI_IOMAP") correctly: it seems that PCI addresses include the
> 'uncached' bit by default to get the right behavior, but dropping that bit
> breaks it.
Not exactly. The CPU has a window in the range 0xa0000000-0xbfffffff which is
an uncached view of its hardware buses. It has another window in the range
0x80000000-0x9fffffff which is a cached view of that region. These windows
cannot be changed and addresses above 0x80000000 are statically mapped and are
only accessible by the kernel (this is hardwired in the MMU).
So the arch has two subwindows to the PCI bus, one cached and one uncached.
These subwindows are further subdivided into ioport and iomem spaces, an SRAM
and some control registers for the CPU-PCI bridge.
David
