We already keep a copy of the CPU's ID stashed in CP0.Context or
CP0.XContext (defined by SMP_CPUID_REG) for use in exceptions handlers
to restore the correct CPUs state.
Currently, bpf uses the thread_info->cpu field, which will vanish when
CONFIG_THREAD_INFO_IN_TASK is activated.
Switch emit_load_cpu to use the CP0 register. A helper function to emit
mfc0 instructions is also added.
A future commit will perform this same modification for the generic
smp_processor_id() function.
Signed-off-by: Matt Redfearn <matt.redfearn@xxxxxxxx>
---
arch/mips/net/bpf_jit.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/arch/mips/net/bpf_jit.c b/arch/mips/net/bpf_jit.c
index ae2ff1f08d5a..ffdc171ce837 100644
--- a/arch/mips/net/bpf_jit.c
+++ b/arch/mips/net/bpf_jit.c
@@ -234,6 +234,12 @@ static inline void emit_andi(unsigned int dst, unsigned int src,
}
}
+static inline void emit_mfc0(unsigned int dst, unsigned int reg,
+ unsigned int select, struct jit_ctx *ctx)
+{
+ emit_instr(ctx, mfc0, dst, reg, select);
+}
+
static inline void emit_xor(unsigned int dst, unsigned int src1,
unsigned int src2, struct jit_ctx *ctx)
{
@@ -520,10 +526,9 @@ static inline void emit_jr(unsigned int reg, struct jit_ctx *ctx)
static inline void emit_load_cpu(unsigned int reg, struct jit_ctx *ctx)
{
- /* A = current_thread_info()->cpu */
- BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4);
- /* $28/gp points to the thread_info struct */
- emit_load(reg, 28, offsetof(struct thread_info, cpu), ctx);
+ /* A = smp_processor_id() */
+ emit_mfc0(reg, SMP_CPUID_REG, ctx);
+ emit_srl(reg, reg, SMP_CPUID_REGSHIFT, ctx);
}
static inline u16 align_sp(unsigned int num)
--
2.7.4
