Certain coprocessor 0 registers (namely CP0_PRId) should never change, and can safely be read with a non-volatile inline asm statement. This improves performance under virtualisation, since access to the CP0_PRId register traps even with hardware assisted virtualisation (VZ), and the use of volatile prevents the compiler discarding the MFC0 if the value isn't used. Patch 1 adds alternative COP0 read macros for registers which shouldn't change, and patch 2 uses one of those macros to read CP0_PRId. Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: Maciej W. Rozycki <macro@xxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx James Hogan (2): MIPS: mipsregs.h: Add read const Cop0 macros MIPS: mipsregs.h: Make read_c0_prid use const accessor arch/mips/include/asm/mipsregs.h | 39 +++++++++++++++++++++++---------- 1 file changed, 28 insertions(+), 11 deletions(-) base-commit: ae64f9bd1d3621b5e60d7363bc20afb46aede215 -- git-series 0.9.1
