On Mon, Oct 09, 2017 at 10:34:43PM -0400, Joshua Kinard wrote: > On 10/09/2017 22:24, Joshua Kinard wrote: > > [snip] > > > This raises the question of why was the standard "kernel_uses_llsc" case > > changed but not the R10000_LLSC_WAR case? The changes seem like they would be > > applicable to the older R10K CPUs regardless, since this is before a lot of the > > code for the newer ISAs (R2+) was added. I am getting a funny feeling that a > > lot of these templates need to be re-written (maybe even in plain C, given > > newer gcc's better intelligence) and other useful cleanups done. I am not > > fluent in MIPS asm enough, though, to know what to change. > > Answered one of my own questions via this buried commit from ~2006/2007 that > has a commit message, but no changed files: > > https://git.linux-mips.org/cgit/ralf/linux.git/commit/arch/mips/include/asm/atomic.h?id=5999eca25c1fd4b9b9aca7833b04d10fe4bc877d > > > [MIPS] Improve branch prediction in ll/sc atomic operations. > > Now that finally all supported versions of binutils have functioning > > support for .subsection use .subsection to tweak the branch prediction > > > > I did not modify the R10000 errata variants because it seems unclear if > > this will invalidate the workaround which actually relies on the cheesy > > prediction of branch likely to cause a misspredict if the sc was > > successful. > > > > Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx> > > Seems like that second paragraph is a ripe candidate for a comment block so > this is better documented :) Btw, I reasonably certain applying the change to the R10000 LL/SC workaround versions as well would work. But testing is difficult, even with hardware at hand - and the other option asing a R10000 RTL designer is tricky about 20 years later! Ralf
