On 03/10/17 12:24, Christophe LEROY wrote:
>
>
> Le 03/10/2017 à 12:43, Christoph Hellwig a écrit :
>> powerpc does not implement DMA_ATTR_NON_CONSISTENT allocations, so it
>> doesn't make any sense to do any work in dma_cache_sync given that it
>> must be a no-op when dma_alloc_attrs returns coherent memory.
> What about arch/powerpc/mm/dma-noncoherent.c ?
AFAICS, just like the ARM code from which it is derived, that will
always return a non-cacheable remap of the allocation, which should thus
not require explicit maintenance after CPU accesses. dma_cache_sync()
would only matter if dma_alloc_attrs(..., DMA_ATTR_NON_CONSISTENT) got
special treatment and was allowed to return a cacheable address, but PPC
doesn't even propagate the attrs to its internal __dma_alloc_coherent()
implementations.
Robin.
> Powerpc 8xx doesn't have coherent memory.
>
> Christophe
>
>>
>> Signed-off-by: Christoph Hellwig <hch@xxxxxx>
>> ---
>> arch/powerpc/include/asm/dma-mapping.h | 2 --
>> 1 file changed, 2 deletions(-)
>>
>> diff --git a/arch/powerpc/include/asm/dma-mapping.h
>> b/arch/powerpc/include/asm/dma-mapping.h
>> index eaece3d3e225..320846442bfb 100644
>> --- a/arch/powerpc/include/asm/dma-mapping.h
>> +++ b/arch/powerpc/include/asm/dma-mapping.h
>> @@ -144,8 +144,6 @@ static inline phys_addr_t dma_to_phys(struct
>> device *dev, dma_addr_t daddr)
>> static inline void dma_cache_sync(struct device *dev, void *vaddr,
>> size_t size,
>> enum dma_data_direction direction)
>> {
>> - BUG_ON(direction == DMA_NONE);
>> - __dma_sync(vaddr, size, (int)direction);
>> }
>> #endif /* __KERNEL__ */
>>
