From: "Steven J. Hill" <Steven.Hill@xxxxxxxxxx> This patchset adds working Octeon Hotplug CPU. It has been tested on our 70xx and 78xx develpoment boards. The 70xx has 4 cores and the 78xx has 48 cores. This was also tested on an EdgerouterPRO, which is 2 cores (whoohoo). Offlining CPUs causes the watchdog NMI to trigger. Our boards do not reset, but when attempting to bring a CPU back online, the booting of that CPU times out and eventually the kernel becomes unstable. This patchset gets hotplug CPU on Octeon "right". Changes in v2: - Reorganized patches per reviewes on mailing list. - Verified that the watchdog timer works for both endians and properly interacts with hotplugging CPUs. The first version disabled the watchdog when hotplug was enabled, but only for little endian. Never tracked down the history of why that was originally done in our internal code. *shrug* - Removed many unneeded mb() in Octeon SMP code. - Removed all usages of 'volatile' in SMP code. - Added in assembly optimizations per ideas from Paul Burton. Chad Reese (1): MIPS: Add nudges to writes for bit unlocks. David Daney (4): MIPS: Allow __cpu_number_map to be larger than NR_CPUS MIPS: Octeon: Populate kernel memory from cvmx_bootmem named blocks. MIPS: Add the concept of BOOT_MEM_KERNEL to boot_mem_map. MIPS: Octeon: Add working hotplug CPU support. Steven J. Hill (7): MIPS: Remove unused variable 'lastpfn' MIPS: Octeon: Remove usage of cvmx_wait() everywhere. MIPS: Octeon: Header and file cleaning. MIPS: Octeon: Update CIU_FUSE registers. MIPS: Octeon: Add Octeon III platforms for console output. MIPS: Octeon: Remove crufty KEXEC and CRASH_DUMP code. MIPS: Add define for number of bits in MMUSizeExt field. arch/mips/Kconfig | 13 +- .../cavium-octeon/executive/cvmx-helper-board.c | 2 +- .../cavium-octeon/executive/cvmx-helper-jtag.c | 1 + .../cavium-octeon/executive/cvmx-helper-rgmii.c | 1 + .../cavium-octeon/executive/cvmx-helper-sgmii.c | 1 + .../mips/cavium-octeon/executive/cvmx-helper-spi.c | 1 + .../cavium-octeon/executive/cvmx-helper-xaui.c | 1 + arch/mips/cavium-octeon/executive/cvmx-helper.c | 3 +- arch/mips/cavium-octeon/executive/cvmx-pko.c | 1 + arch/mips/cavium-octeon/executive/cvmx-spi.c | 11 +- arch/mips/cavium-octeon/executive/octeon-model.c | 53 ++++- arch/mips/cavium-octeon/octeon-platform.c | 1 + arch/mips/cavium-octeon/octeon_boot.h | 95 -------- arch/mips/cavium-octeon/setup.c | 246 +++++++-------------- arch/mips/cavium-octeon/smp.c | 224 +++++++------------ arch/mips/include/asm/bitops.h | 1 + arch/mips/include/asm/bootinfo.h | 1 + arch/mips/include/asm/mach-cavium-octeon/irq.h | 8 + .../asm/mach-cavium-octeon/kernel-entry-init.h | 60 ++++- arch/mips/include/asm/mipsregs.h | 1 + arch/mips/include/asm/octeon/cvmx-asm.h | 6 +- arch/mips/include/asm/octeon/cvmx-ciu-defs.h | 166 ++++++-------- arch/mips/include/asm/octeon/cvmx-coremask.h | 26 ++- arch/mips/include/asm/octeon/cvmx-fpa.h | 4 +- arch/mips/include/asm/octeon/cvmx-sysinfo.h | 4 +- arch/mips/include/asm/octeon/cvmx.h | 42 ++-- arch/mips/include/asm/octeon/octeon.h | 2 + arch/mips/include/asm/smp.h | 2 +- arch/mips/kernel/setup.c | 30 ++- arch/mips/kernel/smp.c | 2 +- arch/mips/mm/init.c | 4 - arch/mips/pci/pcie-octeon.c | 12 +- 32 files changed, 447 insertions(+), 578 deletions(-) delete mode 100644 arch/mips/cavium-octeon/octeon_boot.h -- 2.1.4
