From: David Daney <david.daney@xxxxxxxxxx>
In systems where the CPU id space is sparse, this allows a smaller
NR_CPUS to be chosen, thus keeping internal data structures smaller.
Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
Signed-off-by: Carlos Munoz <cmunoz@xxxxxxxxxxxxxxxxxx>
---
arch/mips/Kconfig | 3 ++-
arch/mips/include/asm/smp.h | 2 +-
arch/mips/kernel/smp.c | 4 ++--
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 48d91d5..ed35fd1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -915,7 +915,8 @@ config CAVIUM_OCTEON_SOC
select USE_OF
select ARCH_SPARSEMEM_ENABLE
select SYS_SUPPORTS_SMP
- select NR_CPUS_DEFAULT_16
+ select NR_CPUS_DEFAULT_64
+ select MIPS_NR_CPU_NR_MAP_1024
select BUILTIN_DTB
select MTD_COMPLEX_MAPPINGS
select SYS_SUPPORTS_RELOCATABLE
diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h
index bab3d41..5fa6c85 100644
--- a/arch/mips/include/asm/smp.h
+++ b/arch/mips/include/asm/smp.h
@@ -29,7 +29,7 @@ extern cpumask_t cpu_foreign_map[];
/* Map from cpu id to sequential logical cpu number. This will only
not be idempotent when cpus failed to come on-line. */
-extern int __cpu_number_map[NR_CPUS];
+extern int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP];
#define cpu_number_map(cpu) __cpu_number_map[cpu]
/* The reverse map from sequential logical cpu number to cpu id. */
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 6bace76..aea84b9 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -48,10 +48,10 @@
#include <asm/setup.h>
#include <asm/maar.h>
-int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
+int __cpu_number_map[CONFIG_MIPS_NR_CPU_NR_MAP]; /* Map physical to logical */
EXPORT_SYMBOL(__cpu_number_map);
-int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
+int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
EXPORT_SYMBOL(__cpu_logical_map);
/* Number of TCs (or siblings in Intel speak) per CPU core */
--
2.1.4
