tree: git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill.git mips-for-linux-next
head: 152e63e374cdc0dc7a321d523dd2930de0acdabf
commit: 6b1e76297c4ad4b906fdf054460e4e56914f6e34 [36/72] MIPS: cmpxchg: Unify R10000_LLSC_WAR & non-R10000_LLSC_WAR cases
config: mips-allyesconfig (attached as .config)
compiler: mips-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 6b1e76297c4ad4b906fdf054460e4e56914f6e34
# save the attached .config to linux build tree
make.cross ARCH=mips
Note: the mips-sjhill/mips-for-linux-next HEAD 152e63e374cdc0dc7a321d523dd2930de0acdabf builds fine.
It only hurts bisectibility.
All error/warnings (new ones prefixed by >>):
In file included from arch/mips/include/asm/atomic.h:22:0,
from include/linux/atomic.h:4,
from include/linux/debug_locks.h:5,
from include/linux/lockdep.h:25,
from include/linux/spinlock_types.h:18,
from kernel/bounds.c:13:
arch/mips/include/asm/atomic.h: In function '__atomic_add_unless':
>> arch/mips/include/asm/cmpxchg.h:135:8: error: expected ':' or ')' before '__scbeqz'
"\t" __scbeqz " $1, 1b \n" \
^
>> arch/mips/include/asm/cmpxchg.h:171:11: note: in expansion of macro '__cmpxchg_asm'
__res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
^~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:189:33: note: in expansion of macro '__cmpxchg'
#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
^~~~~~~~~
>> arch/mips/include/asm/atomic.h:274:34: note: in expansion of macro 'cmpxchg'
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
^~~~~~~
>> arch/mips/include/asm/atomic.h:293:9: note: in expansion of macro 'atomic_cmpxchg'
old = atomic_cmpxchg((v), c, c + (a));
^~~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:135:8: error: expected ':' or ')' before '__scbeqz'
"\t" __scbeqz " $1, 1b \n" \
^
arch/mips/include/asm/cmpxchg.h:175:12: note: in expansion of macro '__cmpxchg_asm'
__res = __cmpxchg_asm("lld", "scd", __ptr, \
^~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:189:33: note: in expansion of macro '__cmpxchg'
#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
^~~~~~~~~
>> arch/mips/include/asm/atomic.h:274:34: note: in expansion of macro 'cmpxchg'
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
^~~~~~~
>> arch/mips/include/asm/atomic.h:293:9: note: in expansion of macro 'atomic_cmpxchg'
old = atomic_cmpxchg((v), c, c + (a));
^~~~~~~~~~~~~~
include/linux/atomic.h: In function 'atomic_inc_not_zero_hint':
>> arch/mips/include/asm/cmpxchg.h:135:8: error: expected ':' or ')' before '__scbeqz'
"\t" __scbeqz " $1, 1b \n" \
^
>> arch/mips/include/asm/cmpxchg.h:171:11: note: in expansion of macro '__cmpxchg_asm'
__res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
^~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:189:33: note: in expansion of macro '__cmpxchg'
#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
^~~~~~~~~
>> arch/mips/include/asm/atomic.h:274:34: note: in expansion of macro 'cmpxchg'
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
^~~~~~~
>> include/linux/atomic.h:592:9: note: in expansion of macro 'atomic_cmpxchg'
val = atomic_cmpxchg(v, c, c + 1);
^~~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:135:8: error: expected ':' or ')' before '__scbeqz'
"\t" __scbeqz " $1, 1b \n" \
^
arch/mips/include/asm/cmpxchg.h:175:12: note: in expansion of macro '__cmpxchg_asm'
__res = __cmpxchg_asm("lld", "scd", __ptr, \
^~~~~~~~~~~~~
>> arch/mips/include/asm/cmpxchg.h:189:33: note: in expansion of macro '__cmpxchg'
#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
^~~~~~~~~
>> arch/mips/include/asm/atomic.h:274:34: note: in expansion of macro 'cmpxchg'
#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
^~~~~~~
>> include/linux/atomic.h:592:9: note: in expansion of macro 'atomic_cmpxchg'
val = atomic_cmpxchg(v, c, c + 1);
^~~~~~~~~~~~~~
include/linux/atomic.h: In function 'atomic_inc_unless_negative':
>> arch/mips/include/asm/cmpxchg.h:135:8: error: expected ':' or ')' before '__scbeqz'
"\t" __scbeqz " $1, 1b \n" \
^
>> arch/mips/include/asm/cmpxchg.h:171:11: note: in expansion of macro '__cmpxchg_asm'
__res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
^~~~~~~~~~~~~
vim +135 arch/mips/include/asm/cmpxchg.h
129 "1: " ld " %0, %2 # __cmpxchg_asm \n" \
130 " bne %0, %z3, 2f \n" \
131 " .set mips0 \n" \
132 " move $1, %z4 \n" \
133 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
134 " " st " $1, %1 \n" \
> 135 "\t" __scbeqz " $1, 1b \n" \
136 " .set pop \n" \
137 "2: \n" \
138 : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
139 : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \
140 : "memory"); \
141 } else { \
142 unsigned long __flags; \
143 \
144 raw_local_irq_save(__flags); \
145 __ret = *m; \
146 if (__ret == old) \
147 *m = new; \
148 raw_local_irq_restore(__flags); \
149 } \
150 \
151 __ret; \
152 })
153
154 /*
155 * This function doesn't exist, so you'll get a linker error
156 * if something tries to do an invalid cmpxchg().
157 */
158 extern void __cmpxchg_called_with_bad_pointer(void);
159
160 #define __cmpxchg(ptr, old, new, pre_barrier, post_barrier) \
161 ({ \
162 __typeof__(ptr) __ptr = (ptr); \
163 __typeof__(*(ptr)) __old = (old); \
164 __typeof__(*(ptr)) __new = (new); \
165 __typeof__(*(ptr)) __res = 0; \
166 \
167 pre_barrier; \
168 \
169 switch (sizeof(*(__ptr))) { \
170 case 4: \
> 171 __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
172 break; \
173 case 8: \
174 if (sizeof(long) == 8) { \
175 __res = __cmpxchg_asm("lld", "scd", __ptr, \
176 __old, __new); \
177 break; \
178 } \
179 default: \
180 __cmpxchg_called_with_bad_pointer(); \
181 break; \
182 } \
183 \
184 post_barrier; \
185 \
186 __res; \
187 })
188
> 189 #define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_mb__before_llsc(), smp_llsc_mb())
190 #define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, , )
191
192 #ifdef CONFIG_64BIT
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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