tree: git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill.git mips-for-linux-next
head: 257d04d7ae9f33e71f9358b46bd4e33da17948ba
commit: 257d04d7ae9f33e71f9358b46bd4e33da17948ba [27/27] Merge branch '4.12-fixes' into mips-for-linux-next
config: mips-mtx1_defconfig (attached as .config)
compiler: mipsel-linux-gnu-gcc (Debian 6.1.1-9) 6.1.1 20160705
reproduce:
wget https://raw.githubusercontent.com/01org/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
git checkout 257d04d7ae9f33e71f9358b46bd4e33da17948ba
# save the attached .config to linux build tree
make.cross ARCH=mips
All errors (new ones prefixed by >>):
arch/mips/kernel/perf_event_mipsxx.c: In function 'mipsxx_pmu_map_raw_event':
>> arch/mips/kernel/perf_event_mipsxx.c:1614:2: error: duplicate case value
case CPU_I6400:
^~~~
>> arch/mips/kernel/perf_event_mipsxx.c:1600:2: error: previously used here
case CPU_I6400:
^~~~
vim +1614 arch/mips/kernel/perf_event_mipsxx.c
c52068bd Deng-Cheng Zhu 2014-02-10 1594 #ifdef CONFIG_MIPS_MT_SMP
c52068bd Deng-Cheng Zhu 2014-02-10 1595 raw_event.range = P;
c52068bd Deng-Cheng Zhu 2014-02-10 1596 #endif
c52068bd Deng-Cheng Zhu 2014-02-10 1597 break;
560b461b James Hogan 2014-07-04 1598 case CPU_P5600:
1091bfa2 Paul Burton 2016-02-03 1599 case CPU_P6600:
4e88a862 Markos Chandras 2015-07-09 @1600 case CPU_I6400:
dd71e57b Marcin Nowakowski 2017-06-13 1601 case CPU_I6500:
560b461b James Hogan 2014-07-04 1602 /* 8-bit event numbers */
560b461b James Hogan 2014-07-04 1603 raw_id = config & 0x1ff;
560b461b James Hogan 2014-07-04 1604 base_id = raw_id & 0xff;
560b461b James Hogan 2014-07-04 1605 if (IS_BOTH_COUNTERS_P5600_EVENT(base_id))
560b461b James Hogan 2014-07-04 1606 raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD;
560b461b James Hogan 2014-07-04 1607 else
560b461b James Hogan 2014-07-04 1608 raw_event.cntr_mask =
560b461b James Hogan 2014-07-04 1609 raw_id > 255 ? CNTR_ODD : CNTR_EVEN;
560b461b James Hogan 2014-07-04 1610 #ifdef CONFIG_MIPS_MT_SMP
560b461b James Hogan 2014-07-04 1611 raw_event.range = P;
560b461b James Hogan 2014-07-04 1612 #endif
560b461b James Hogan 2014-07-04 1613 break;
f7a31b5e Marcin Nowakowski 2017-04-19 @1614 case CPU_I6400:
f7a31b5e Marcin Nowakowski 2017-04-19 1615 /* 8-bit event numbers */
f7a31b5e Marcin Nowakowski 2017-04-19 1616 base_id = config & 0xff;
f7a31b5e Marcin Nowakowski 2017-04-19 1617 raw_event.cntr_mask = CNTR_EVEN | CNTR_ODD;
:::::: The code at line 1614 was first introduced by commit
:::::: f7a31b5e7874f77464a4eae0a8ba84b9ae0b3a54 MIPS: perf: Remove incorrect odd/even counter handling for I6400
:::::: TO: Marcin Nowakowski <marcin.nowakowski@xxxxxxxxxx>
:::::: CC: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
Attachment:
.config.gz
Description: application/gzip
