__mips_isa_rev is a predefined macro provided by gcc to indicate the
revision of the MIPS ISA being targeted by the compiler. That is, for a
MIPS32r1 or MIPS64r1 build __mips_isa_rev will expand to 1, etc.
Unfortunately __mips_isa_rev isn't universally provided by gcc. In
particular it appears that gcc doesn't define __mips_isa_rev for
pre-MIPS32r1 builds, which leads to uses of it causing builds to fail
with errors such as:
In file included from ./arch/mips/include/asm/bitops.h:21:0,
from ./include/linux/bitops.h:36,
from ./include/linux/kernel.h:10,
from arch/mips/kernel/cpu-probe.c:15:
arch/mips/kernel/cpu-probe.c: In function 'cpu_set_nan_2008':
./arch/mips/include/asm/cpu-features.h:52:38: error: '__mips_isa_rev'
undeclared (first use in this function); did you mean '__mips_set_bit'?
#define __isa_lt_and_opt(isa, opt) ((__mips_isa_rev < (isa)) && __opt(opt))
^
In order to avoid this & allow use of __mips_isa_rev without having to
check whether it's defined at every use, this patch introduces a new
asm/isarev.h header which simply ensures that __mips_isa_rev is
provided. If the compiler predefines it then it is left alone, otherwise
it is set based upon CONFIG_CPU_MIPSR*. If we are targeting a pre-MIPSr1
ISA then __mips_isa_rev is defined as 0 which allows it to be used
logically in comparisons.
The 2 current non-UAPI uses of __mips_isa_rev are adjusted to include
asm/isarev.h & drop checks of defined(__mips_isa_rev).
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
Cc: Joshua Kinard <kumba@xxxxxxxxxx>
Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
---
Changes in v2:
- New patch.
arch/mips/include/asm/isarev.h | 26 ++++++++++++++++++++++++++
arch/mips/net/bpf_jit_asm.S | 9 +++++----
arch/mips/vdso/elf.S | 7 ++-----
3 files changed, 33 insertions(+), 9 deletions(-)
create mode 100644 arch/mips/include/asm/isarev.h
diff --git a/arch/mips/include/asm/isarev.h b/arch/mips/include/asm/isarev.h
new file mode 100644
index 000000000000..dc0aa95edfe9
--- /dev/null
+++ b/arch/mips/include/asm/isarev.h
@@ -0,0 +1,26 @@
+/*
+ * Copyright (C) 2017 Imagination Technologies
+ * Author: Paul Burton <paul.burton@xxxxxxxxxx>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ */
+
+#if defined(__mips_isa_rev)
+# /* Yay, the compiler predefined __mips_isa_rev */
+#elif defined(CONFIG_CPU_MIPSR6)
+# define __mips_isa_rev 6
+#elif defined(CONFIG_CPU_MIPSR2)
+# define __mips_isa_rev 2
+#elif defined(CONFIG_CPU_MIPSR1)
+# define __mips_isa_rev 1
+#else
+# define __mips_isa_rev 0
+#endif
diff --git a/arch/mips/net/bpf_jit_asm.S b/arch/mips/net/bpf_jit_asm.S
index 88a2075305d1..5c1fca296c8d 100644
--- a/arch/mips/net/bpf_jit_asm.S
+++ b/arch/mips/net/bpf_jit_asm.S
@@ -11,6 +11,7 @@
*/
#include <asm/asm.h>
+#include <asm/isarev.h>
#include <asm/regdef.h>
#include "bpf_jit.h"
@@ -65,7 +66,7 @@ FEXPORT(sk_load_word_positive)
lw $r_A, 0(t1)
.set noreorder
#ifdef CONFIG_CPU_LITTLE_ENDIAN
-# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
+# if __mips_isa_rev >= 2
wsbh t0, $r_A
rotr $r_A, t0, 16
# else
@@ -92,7 +93,7 @@ FEXPORT(sk_load_half_positive)
PTR_ADDU t1, $r_skb_data, offset
lhu $r_A, 0(t1)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
-# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
+# if __mips_isa_rev >= 2
wsbh $r_A, $r_A
# else
sll t0, $r_A, 8
@@ -170,7 +171,7 @@ FEXPORT(sk_load_byte_positive)
NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
bpf_slow_path_common(4)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
-# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
+# if __mips_isa_rev >= 2
wsbh t0, $r_s0
jr $r_ra
rotr $r_A, t0, 16
@@ -196,7 +197,7 @@ NESTED(bpf_slow_path_word, (6 * SZREG), $r_sp)
NESTED(bpf_slow_path_half, (6 * SZREG), $r_sp)
bpf_slow_path_common(2)
#ifdef CONFIG_CPU_LITTLE_ENDIAN
-# if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
+# if __mips_isa_rev >= 2
jr $r_ra
wsbh $r_A, $r_s0
# else
diff --git a/arch/mips/vdso/elf.S b/arch/mips/vdso/elf.S
index be37bbb1f061..15d8b1afee56 100644
--- a/arch/mips/vdso/elf.S
+++ b/arch/mips/vdso/elf.S
@@ -12,6 +12,7 @@
#include <linux/elfnote.h>
#include <linux/version.h>
+#include <asm/isarev.h>
ELFNOTE_START(Linux, 0, "a")
.long LINUX_VERSION_CODE
@@ -40,11 +41,7 @@ __mips_abiflags:
.byte __mips /* isa_level */
/* isa_rev */
-#ifdef __mips_isa_rev
.byte __mips_isa_rev
-#else
- .byte 0
-#endif
/* gpr_size */
#ifdef __mips64
@@ -54,7 +51,7 @@ __mips_abiflags:
#endif
/* cpr1_size */
-#if (defined(__mips_isa_rev) && __mips_isa_rev >= 6) || defined(__mips64)
+#if (__mips_isa_rev >= 6) || defined(__mips64)
.byte 2 /* AFL_REG_64 */
#else
.byte 1 /* AFL_REG_32 */
--
2.13.1
