On 05/25/2017 08:22 PM, Hauke Mehrtens wrote: > On 05/22/2017 08:05 AM, Andy Shevchenko wrote: >> On Sun, May 21, 2017 at 4:09 PM, Hauke Mehrtens <hauke@xxxxxxxxxx> wrote: >>> From: Martin Blumenstingl <martin.blumenstingl@xxxxxxxxxxxxxx> >>> >>> This allows using the xbar driver on ARX300 based SoCs which require the >>> same xbar setup as the xRX200 chipsets because the xbar driver >>> initialization is not guarded by an xRX200 specific >>> of_machine_is_compatible condition anymore. Additionally the new driver >>> takes a syscon phandle to configure the XBAR endianness bits in RCU >>> (before this was done in arch/mips/lantiq/xway/reset.c and also >>> guarded by an VRX200 specific if-statement). >> >> >>> +builtin_platform_driver(xbar_driver); >> >> Why it can't be module? > > Currently this is used to load it early. This sets the AHB bus system > which connects the USB and the PCIe controllers to the system to big > Endian mode, this is needed for at least some accesses to these > components. It would be better to have a dependency in device tree to > reflect this. > Should I use a phandle to connect them? > > Hauke > I will try to make this a bus driver which should be used instead of the smiple-bus. Hauke
