Re: [PATCH 1/1] BMIPS: Enable HARDIRQS_SW_RESEND

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Le 05/24/17 à 10:55, justinpopo6@xxxxxxxxx a écrit :
> From: Justin Chen <justin.chen@xxxxxxxxxxxx>
> 
> HW interrupts triggered when irq_disable() were being ignored. Enable
> resending HW interrupts as SW interrupts.
> 
> This was causing an issue where the interrupts waking the system up from
> a suspend state were not calling their interrupt handlers.
> 
> Signed-off-by: Justin Chen <justinpopo6@xxxxxxxxx>

Acked-by: Florian Fainelli <f.fainelli@xxxxxxxxx>

> ---
>  arch/mips/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 2828ecde133d..349f9bdb655b 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -230,6 +230,7 @@ config BMIPS_GENERIC
>  	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>  	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>  	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
> +	select HARDIRQS_SW_RESEND
>  	help
>  	  Build a generic DT-based kernel image that boots on select
>  	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
> 


-- 
Florian




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