Re: [PATCH 1/8] MIPS: Add Octeon III register accessors & definitions

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Wed, Mar 15, 2017 at 02:41:32PM +0100, Ralf Baechle wrote:
> On Tue, Mar 14, 2017 at 10:25:44AM +0000, James Hogan wrote:
> 
> > Add accessors for some VZ related Cavium Octeon III specific COP0
> > registers, along with field definitions. These will mostly be used by
> > KVM to set up interrupt routing and partition the TLB between root and
> > guest.
> 
> Acked-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>

Thanks!

> 
> Btw, asm/mipsregs.h is growing towards 3000 lines making it a candiate
> for splitting.

Yes, it already contains:
1) CP0 register numbers (~80 lines)
2) CP0/CP1 register field definitions (~1000 lines)
3) Various thin MIPS assembly wrappers (~900 lines)
4) CP0/CP1 [guest] register accessors & modifiers (~700 lines)

Maybe it makes sense to start by splitting out all those assembly
wrappers (3) into an asm/mipsops.h, which asm/mipsregs.h includes and
uses for defining the register accessors.

Cheers
James

Attachment: signature.asc
Description: Digital signature


[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux