Re: [PATCH V2 2/7] MIPS: Loongson: Add NMI handler support

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With this patch, I met a problem on Loongson 3A 1000:

kernel: [1692。089996] NMI watchdog: BUG: soft lockup - CPU#0 stuck for
22s! [apt-get: 9687]

I will try to recomplie the kernel without this patch.

It seems that it works well on Loongson 3A 3000.

On Mon, Nov 14, 2016 at 11:12 AM, Huacai Chen <chenhc@xxxxxxxxxx> wrote:
> Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx>
> ---
>  arch/mips/loongson64/common/init.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>
> diff --git a/arch/mips/loongson64/common/init.c b/arch/mips/loongson64/common/init.c
> index 9b987fe..6ef1712 100644
> --- a/arch/mips/loongson64/common/init.c
> +++ b/arch/mips/loongson64/common/init.c
> @@ -10,13 +10,25 @@
>
>  #include <linux/bootmem.h>
>  #include <asm/bootinfo.h>
> +#include <asm/traps.h>
>  #include <asm/smp-ops.h>
> +#include <asm/cacheflush.h>
>
>  #include <loongson.h>
>
>  /* Loongson CPU address windows config space base address */
>  unsigned long __maybe_unused _loongson_addrwincfg_base;
>
> +static void __init mips_nmi_setup(void)
> +{
> +       void *base;
> +       extern char except_vec_nmi;
> +
> +       base = (void *)(CAC_BASE + 0x380);
> +       memcpy(base, &except_vec_nmi, 0x80);
> +       flush_icache_range((unsigned long)base, (unsigned long)base + 0x80);
> +}
> +
>  void __init prom_init(void)
>  {
>  #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
> @@ -40,6 +52,7 @@ void __init prom_init(void)
>         /*init the uart base address */
>         prom_init_uart_base();
>         register_smp_ops(&loongson3_smp_ops);
> +       board_nmi_handler_setup = mips_nmi_setup;
>  }
>
>  void __init prom_free_prom_memory(void)
> --
> 2.7.0
>
>
>
>



-- 
YunQiang Su




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