From: Paul Burton <paul.burton@xxxxxxxxxx>
When building for microMIPS we need to ensure that the assembler always
knows that there is code at the target of a branch or jump. Commit
7170bdc77755 ("MIPS: Add return errors to protected cache ops")
introduced a fixup path to protected_cache(e)_op() which does not meet
this requirement. The fixup path jumps to the "2" label but we don't
know what will be placed at that label since it's at the end of the
inline asm. If the inline asm happens to be followed by an instruction
manually encoded with .word or similar then the toolchain will not know
that "2" labels code and linking will fail with:
mips-img-linux-gnu-ld: arch/mips/mm/c-r4k.o: .fixup+0x0: Unsupported
jump between ISA modes; consider recompiling with interlinking
enabled.
Fix this by declaring that "2" labels code using the .insn directive.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
Fixes: 7170bdc77755 ("MIPS: Add return errors to protected cache ops")
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: James Hogan <james.hogan@xxxxxxxxxx>
---
Ralf: This fixes microMIPS build since a patch that is already merged
into kvm/next. I was going to send you a pull request for those patches
anyway, so it probably makes sense if I just append to that branch first
and let the fix get upstream via the MIPS tree.
---
arch/mips/include/asm/r4kcache.h | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index 7227c158cbf8..55fd94e6cd0b 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -154,7 +154,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set noreorder \n" \
" .set "MIPS_ISA_ARCH_LEVEL" \n" \
"1: cache %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
@@ -177,7 +178,8 @@ static inline void flush_scache_line(unsigned long addr)
" .set mips0 \n" \
" .set eva \n" \
"1: cachee %1, (%2) \n" \
- "2: .set pop \n" \
+ "2: .insn \n" \
+ " .set pop \n" \
" .section .fixup,\"ax\" \n" \
"3: li %0, %3 \n" \
" j 2b \n" \
--
2.11.0
