[PATCH 0/10] KVM: MIPS: Implement GPA page tables and shadow flushing

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Note: My intention is to take this series via the MIPS KVM tree along
with the others for v4.11, with a topic branch containing the MIPS
architecture change, so an ack is welcome for patch 1 in particular.

This series first converts MIPS KVM to use page tables for its GPA ->
HPA mappings instead of a linear array. The linear array was only really
meant to be temporary, and isn't sparse so its wasteful of memory. It
also never handled resizing of the array for multiple or changed memory
regions, which a sparse page table pretty much handles automatically.

We then go on to implement the shadow flushing architecture callbacks to
allow the mappings (page tables and TLB entries) to be flushed in
response to memory region changes. This is fairly straightforward for
GPA which is shared between VCPUs as the kvm->mmu_lock can protect it,
but GVA page tables are specific to a VCPU so are accessed locklessly.
This would make it unsafe to directly modify any GVA page tables, so we
wire up the TLB flush VCPU request so that we can tell a possibly
running VCPU to flush its own GVA mappings.

Since MIPS KVM emulation code can also access GVA mappings directly, we
use the READING_SHADOW_PAGE_TABLES VCPU mode similar to how x86 does to
locklessly protect these accesses. This ensures that either the flush
will take place before the GVA access, or an IPI will be sent to confirm
receipt of the request which will be delayed until after the GVA access
is complete.

The patches are roughly grouped as follows:

Patch 1:
  This is a MIPS architecture change needed for patch 9. As I mentioned
  above I intend to combine this into a topic branch which can be merged
  into both the MIPS architecture tree and the MIPS KVM tree.

Patch 2:
  This singularly converts GPA to use page tables.

Patches 3-10:
  These implement shadow flushing, first laying the ground work to allow
  TLB flush requests to work and to protect direct GVA access from
  asynchronous flush requests.

Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx>
Cc: "Radim Krčmář" <rkrcmar@xxxxxxxxxx>
Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Cc: kvm@xxxxxxxxxxxxxxx

James Hogan (10):
  MIPS: Add return errors to protected cache ops
  KVM: MIPS/MMU: Convert guest physical map to page table
  KVM: MIPS: Update vcpu->mode and vcpu->cpu
  KVM: MIPS/T&E: Handle TLB invalidation requests
  KVM: MIPS/T&E: Reduce stale ASID checks
  KVM: MIPS/T&E: Add lockless GVA access helpers
  KVM: MIPS/T&E: Use lockless GVA helpers for dyntrans
  KVM: MIPS/MMU: Use lockless GVA helpers for get_inst()
  KVM: MIPS/Emulate: Use lockless GVA helpers for cache emulation
  KVM: MIPS: Implement kvm_arch_flush_shadow_all/memslot

 arch/mips/include/asm/kvm_host.h |  35 ++-
 arch/mips/include/asm/r4kcache.h |  55 +++--
 arch/mips/kvm/dyntrans.c         |  26 +-
 arch/mips/kvm/emulate.c          | 149 +++++--------
 arch/mips/kvm/mips.c             |  92 +++++---
 arch/mips/kvm/mmu.c              | 367 ++++++++++++++++++++++++++++----
 arch/mips/kvm/tlb.c              |  35 +---
 arch/mips/kvm/trap_emul.c        | 185 ++++++++++++----
 8 files changed, 690 insertions(+), 254 deletions(-)

-- 
git-series 0.8.10




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