This series implements the use of the CP0_BadInstr and CP0_BadInstrP registers for instruction emulation in MIPS KVM when they are available. These provide the encoding of a faulting instruction (and its prior branch instruction if applicable). The use of these registers should be more robust than using kvm_get_inst(), as it actually gives the instruction encoding seen by the hardware rather than relying on user accessors after the fact, which can be fooled by incoherent icache or a racing code modification. It will also work with VZ, where the guest virtual memory isn't directly accessible by the host with user accessors. The series is based on my recent "KVM: MIPS: Implement GVA page tables" series Cc: Paolo Bonzini <pbonzini@xxxxxxxxxx> Cc: "Radim Krčmář" <rkrcmar@xxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx Cc: kvm@xxxxxxxxxxxxxxx James Hogan (3): KVM: MIPS/T&E: Don't treat code fetch faults as MMIO KVM: MIPS: Improve kvm_get_inst() error return KVM: MIPS: Use CP0_BadInstr[P] for emulation arch/mips/include/asm/kvm_host.h | 34 +++++++- arch/mips/kvm/emulate.c | 132 +++++++++++++++++++++----------- arch/mips/kvm/entry.c | 14 +++- arch/mips/kvm/mips.c | 7 +- arch/mips/kvm/mmu.c | 9 +-- arch/mips/kvm/trap_emul.c | 12 +++- 6 files changed, 155 insertions(+), 53 deletions(-) -- git-series 0.8.10
