On 2016-12-10 14:25, Måns Rullgård wrote: > Felix Fietkau <nbd@xxxxxxxx> writes: > >> On 2016-12-07 19:54, Jason A. Donenfeld wrote: >>> On Wed, Dec 7, 2016 at 7:51 PM, David Miller <davem@xxxxxxxxxxxxx> wrote: >>>> It's so much better to analyze properly where the misalignment comes from >>>> and address it at the source, as we have for various cases that trip up >>>> Sparc too. >>> >>> That's sort of my attitude too, hence starting this thread. Any >>> pointers you have about this would be most welcome, so as not to >>> perpetuate what already seems like an issue in other parts of the >>> stack. >> Hi Jason, >> >> I'm the author of that hackish LEDE/OpenWrt patch that works around the >> misalignment issues. Here's some context regarding that patch: >> >> I intentionally put it in the target specific patches for only one of >> our MIPS targets. There are a few ar71xx devices where the misalignment >> cannot be fixed, because the Ethernet MAC has a 4-byte DMA alignment >> requirement, and does not support inserting 2 bytes of padding to >> correct the IP header misalignment. >> >> With these limitations the choice was between this ugly network stack >> patch or inserting a very expensive memmove in the data path (which is >> better than taking the mis-alignment traps, but still hurts routing >> performance significantly). > > I solved this problem in an Ethernet driver by copying the initial part > of the packet to an aligned skb and appending the remainder using > skb_add_rx_frag(). The kernel network stack only cares about the > headers, so the alignment of the packet payload doesn't matter. I considered that as well, but it's bad for routing performance if the ethernet MAC does not support scatter/gather for xmit. Unfortunately that limitation is quite common on embedded hardware. - Felix
