On Mon, Sep 05, 2016 at 03:24:54PM +0100, Paul Burton wrote:
> Commit f70ddc07b637 ("MIPS: c-r4k: Avoid small flush_icache_range SMP
> calls") adds checks to force use of hit-type cache ops for small icache
> flushes where they are globalised & index-type cache ops aren't, in
> order to avoid the overhead of IPIs in those cases. However it
> calculated the size of the region being flushed incorrectly, subtracting
> the end address from the start address rather than the reverse. This
> would have led to an overflow with size wrapping round to some large
> value, and likely to the special case for avoiding IPIs not actually
> being hit.
>
> Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
> Cc: James Hogan <james.hogan@xxxxxxxxxx>
> Fixes: f70ddc07b637 ("MIPS: c-r4k: Avoid small flush_icache_range SMP calls")
Good catch Paul! I've no idea how that happened.
Reviewed-by: James Hogan <james.hogan@xxxxxxxxxx>
Ralf: It'd be great to get this into v4.8 if possible.
Thanks
James
> ---
>
> arch/mips/mm/c-r4k.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
> index 1af381f..69b1f10 100644
> --- a/arch/mips/mm/c-r4k.c
> +++ b/arch/mips/mm/c-r4k.c
> @@ -811,7 +811,7 @@ static void __r4k_flush_icache_range(unsigned long start, unsigned long end,
> * If address-based cache ops don't require an SMP call, then
> * use them exclusively for small flushes.
> */
> - size = start - end;
> + size = end - start;
> cache_size = icache_size;
> if (!cpu_has_ic_fills_f_dc) {
> size *= 2;
> --
> 2.9.3
>
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