P6600 implements the same lightweight sync types as previous CPUs. Signed-off-by: Matt Redfearn <matt.redfearn@xxxxxxxxxx> Reviewed-by: Paul Burton <paul.burton@xxxxxxxxxx> --- arch/mips/kernel/pm-cps.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index c6b9ad2256f0..f8c8edd0a451 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c @@ -674,6 +674,7 @@ static int __init cps_pm_init(void) case CPU_PROAPTIV: case CPU_M5150: case CPU_P5600: + case CPU_P6600: stype_intervention = 0x2; stype_memory = 0x3; stype_ordering = 0x10; -- 2.7.4
