Re: [v3 0/5] Add device nodes for BCM7xxx SoCs

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



Hi Jonas,

On Aug 12, 2016, at 7:51 PM, Jonas Gorski <jonas.gorski@xxxxxxxxx> wrote:
> 
> Hi,
> 
> On 12 August 2016 at 10:52, Jaedon Shin <jaedon.shin@xxxxxxxxx> wrote:
>> This patch series adds support for Broadcom BCM7xxx MIPS based SoCs.
>> 
>> The NAND device nodes have common file including chip select, BCH
>> and partitions for the reference board with the same properties.
>> 
>> Changes in v3:
>> - Fixed incorrect interrupt number in aon_pm_l2_intc.
>> 
>> Changes in v2:
>> - Removed status properties in always enabled GPIO nodes.
>> - Removed NAND nodes for v3.3 brcmnand controller.
>> - Renamed interrupt-controller instead of lable string.
>> - Renamed bcm97xxx-nand-cs1-bch8.dtsi
>> 
>> Jaedon Shin (5):
>>  MIPS: BMIPS: Add support PWM device nodes
>>  MIPS: BMIPS: Add support GPIO device nodes
>>  MIPS: BMIPS: Add support SDHCI device nodes
>>  MIPS: BMIPS: Add support NAND device nodes
>>  MIPS: BMIPS: Use interrupt-controller node name
> 
> Please directly add the interrupt controller names with the correct
> name instead of fixing them up later.
> 
> Also please CC devicetree@vger for device tree related patches.
> 
> 
> Regards
> Jonas

The last commit "MIPS: BMIPS: Use interrupt-controller node name" has 
on all changes about interrupt-controller@ not only your comments.
I think it is needed for consistency and historicity.

Thanks,
Jaedon




[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux