Changes node names of the interrupt-controller device nodes to
interrupt-controller instead of label strings.
Signed-off-by: Jaedon Shin <jaedon.shin@xxxxxxxxx>
---
arch/mips/boot/dts/brcm/bcm7125.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7346.dtsi | 14 +++++++-------
arch/mips/boot/dts/brcm/bcm7358.dtsi | 14 +++++++-------
arch/mips/boot/dts/brcm/bcm7360.dtsi | 14 +++++++-------
arch/mips/boot/dts/brcm/bcm7362.dtsi | 14 +++++++-------
arch/mips/boot/dts/brcm/bcm7420.dtsi | 8 ++++----
arch/mips/boot/dts/brcm/bcm7425.dtsi | 14 +++++++-------
arch/mips/boot/dts/brcm/bcm7435.dtsi | 14 +++++++-------
8 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 746ed06c85de..bbd00f65ce39 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -26,7 +26,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -55,7 +55,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@441400 {
+ periph_intc: interrupt-controller@441400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x441400 0x30>, <0x441600 0x30>;
@@ -66,7 +66,7 @@
interrupts = <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@401800 {
+ sun_l2_intc: interrupt-controller@401800 {
compatible = "brcm,l2-intc";
reg = <0x401800 0x30>;
interrupt-controller;
@@ -87,7 +87,7 @@
"avd_0", "jtag_0";
};
- upg_irq0_intc: upg_irq0_intc@406780 {
+ upg_irq0_intc: interrupt-controller@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 1e19050825b5..487687bd878c 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -26,7 +26,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -55,7 +55,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@411400 {
+ periph_intc: interrupt-controller@411400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x411400 0x30>, <0x411600 0x30>;
@@ -66,7 +66,7 @@
interrupts = <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -87,7 +87,7 @@
"jtag_0", "svd_0";
};
- upg_irq0_intc: upg_irq0_intc@406780 {
+ upg_irq0_intc: interrupt-controller@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
@@ -102,7 +102,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+ upg_aon_irq0_intc: interrupt-controller@408b80 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x408b80 0x8>;
@@ -232,7 +232,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
@@ -372,7 +372,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@411000 {
+ hif_l2_intc: interrupt-controller@411000 {
compatible = "brcm,l2-intc";
reg = <0x411000 0x30>;
interrupt-controller;
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 079163b00994..6f9b8423152a 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -20,7 +20,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -49,7 +49,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@411400 {
+ periph_intc: interrupt-controller@411400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x411400 0x30>;
@@ -60,7 +60,7 @@
interrupts = <2>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -81,7 +81,7 @@
"avd_0", "jtag_0";
};
- upg_irq0_intc: upg_irq0_intc@406600 {
+ upg_irq0_intc: interrupt-controller@406600 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406600 0x8>;
@@ -96,7 +96,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+ upg_aon_irq0_intc: interrupt-controller@408b80 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x408b80 0x8>;
@@ -216,7 +216,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408240 {
+ aon_pm_l2_intc: interrupt-controller@408240 {
compatible = "brcm,l2-intc";
reg = <0x408240 0x30>;
interrupt-controller;
@@ -299,7 +299,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@411000 {
+ hif_l2_intc: interrupt-controller@411000 {
compatible = "brcm,l2-intc";
reg = <0x411000 0x30>;
interrupt-controller;
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 37dc60a3e730..094d288eace8 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -20,7 +20,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -49,7 +49,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@411400 {
+ periph_intc: interrupt-controller@411400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x411400 0x30>;
@@ -60,7 +60,7 @@
interrupts = <2>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -81,7 +81,7 @@
"avd_0", "jtag_0";
};
- upg_irq0_intc: upg_irq0_intc@406600 {
+ upg_irq0_intc: interrupt-controller@406600 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406600 0x8>;
@@ -96,7 +96,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+ upg_aon_irq0_intc: interrupt-controller@408b80 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x408b80 0x8>;
@@ -208,7 +208,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
@@ -291,7 +291,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@411000 {
+ hif_l2_intc: interrupt-controller@411000 {
compatible = "brcm,l2-intc";
reg = <0x411000 0x30>;
interrupt-controller;
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index b148acb7e116..5a849dbd1b6a 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -26,7 +26,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -55,7 +55,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@411400 {
+ periph_intc: interrupt-controller@411400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x411400 0x30>, <0x411600 0x30>;
@@ -66,7 +66,7 @@
interrupts = <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -87,7 +87,7 @@
"avd_0", "jtag_0";
};
- upg_irq0_intc: upg_irq0_intc@406600 {
+ upg_irq0_intc: interrupt-controller@406600 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406600 0x8>;
@@ -102,7 +102,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+ upg_aon_irq0_intc: interrupt-controller@408b80 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x408b80 0x8>;
@@ -204,7 +204,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
@@ -287,7 +287,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@411000 {
+ hif_l2_intc: interrupt-controller@411000 {
compatible = "brcm,l2-intc";
reg = <0x411000 0x30>;
interrupt-controller;
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0d391d77c780..b143723c674e 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -26,7 +26,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -55,7 +55,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@441400 {
+ periph_intc: interrupt-controller@441400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x441400 0x30>, <0x441600 0x30>;
@@ -66,7 +66,7 @@
interrupts = <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@401800 {
+ sun_l2_intc: interrupt-controller@401800 {
compatible = "brcm,l2-intc";
reg = <0x401800 0x30>;
interrupt-controller;
@@ -88,7 +88,7 @@
"jtag_0";
};
- upg_irq0_intc: upg_irq0_intc@406780 {
+ upg_irq0_intc: interrupt-controller@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index a80d5d1e31ed..0f51a438f42b 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -26,7 +26,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -55,7 +55,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@41a400 {
+ periph_intc: interrupt-controller@41a400 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x41a400 0x30>, <0x41a600 0x30>;
@@ -66,7 +66,7 @@
interrupts = <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -89,7 +89,7 @@
"vice_0";
};
- upg_irq0_intc: upg_irq0_intc@406780 {
+ upg_irq0_intc: interrupt-controller@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
@@ -104,7 +104,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+ upg_aon_irq0_intc: interrupt-controller@409480 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x409480 0x8>;
@@ -231,7 +231,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
@@ -371,7 +371,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@41a000 {
+ hif_l2_intc: interrupt-controller@41a000 {
compatible = "brcm,l2-intc";
reg = <0x41a000 0x30>;
interrupt-controller;
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index ae5c6311db59..4d57319f3e48 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -38,7 +38,7 @@
uart0 = &uart0;
};
- cpu_intc: cpu_intc {
+ cpu_intc: interrupt-controller {
#address-cells = <0>;
compatible = "mti,cpu-interrupt-controller";
@@ -67,7 +67,7 @@
compatible = "simple-bus";
ranges = <0 0x10000000 0x01000000>;
- periph_intc: periph_intc@41b500 {
+ periph_intc: interrupt-controller@41b500 {
compatible = "brcm,bcm7038-l1-intc";
reg = <0x41b500 0x40>, <0x41b600 0x40>,
<0x41b700 0x40>, <0x41b800 0x40>;
@@ -79,7 +79,7 @@
interrupts = <2>, <3>, <2>, <3>;
};
- sun_l2_intc: sun_l2_intc@403000 {
+ sun_l2_intc: interrupt-controller@403000 {
compatible = "brcm,l2-intc";
reg = <0x403000 0x30>;
interrupt-controller;
@@ -104,7 +104,7 @@
"scpu";
};
- upg_irq0_intc: upg_irq0_intc@406780 {
+ upg_irq0_intc: interrupt-controller@406780 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x406780 0x8>;
@@ -119,7 +119,7 @@
interrupt-names = "upg_main", "upg_bsc";
};
- upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+ upg_aon_irq0_intc: interrupt-controller@409480 {
compatible = "brcm,bcm7120-l2-intc";
reg = <0x409480 0x8>;
@@ -246,7 +246,7 @@
status = "disabled";
};
- aon_pm_l2_intc: aon_pm_l2_intc@408440 {
+ aon_pm_l2_intc: interrupt-controller@408440 {
compatible = "brcm,l2-intc";
reg = <0x408440 0x30>;
interrupt-controller;
@@ -386,7 +386,7 @@
status = "disabled";
};
- hif_l2_intc: hif_l2_intc@41b000 {
+ hif_l2_intc: interrupt-controller@41b000 {
compatible = "brcm,l2-intc";
reg = <0x41b000 0x30>;
interrupt-controller;
--
2.9.2
