A recent merge has broken the LLVMLinux build for 32-bit little endian. I've
bisected it to 380cd58 and it looks like a bug in the kernel to me. Clang is
rejecting the inline assembly in the expansion of 'write_c0_kpgd
(swapper_pg_dir)' of tlbex.c. The relevant inline assembly can be found in
__write_64bit_c0_split() and is attempting to use the 'L' and 'M' print
modifiers on swapper_pg_dir which is a 32-bit unsigned long. These print
modifiers only make sense for 64-bit values so I think the kernel source is
incorrect.
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Reported-by: Daniel Sanders <Daniel.Sanders@xxxxxxxxxx>
Cc: Huacai Chen <chenhc@xxxxxxxxxx>
Cc: Aurelien Jarno <aurelien@xxxxxxxxxxx>
Cc: Fuxin Zhang <zhangfx@xxxxxxxxxx>
Cc: Zhangjin Wu <wuzhangjin@xxxxxxxxx>
---
I don't have Loongson 3 hardware for testing, could somebody of the Loongson
folks please review / test this? Thanks!
arch/mips/include/asm/mipsregs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index e1ca65c..044fab6 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1652,8 +1652,8 @@ do { \
#define read_c0_pgd() __read_64bit_c0_register($9, 7)
#define write_c0_pgd(val) __write_64bit_c0_register($9, 7, val)
-#define read_c0_kpgd() __read_64bit_c0_register($31, 7)
-#define write_c0_kpgd(val) __write_64bit_c0_register($31, 7, val)
+#define read_c0_kpgd() __read_ulong_c0_register($31, 7)
+#define write_c0_kpgd(val) __write_ulong_c0_register($31, 7, val)
/* Cavium OCTEON (cnMIPS) */
#define read_c0_cvmcount() __read_ulong_c0_register($9, 6)
