On Mon, May 16, 2016 at 07:32:35PM +0100, James Hogan wrote: > Fix perf hardware performance counter event numbers for I6400. This core > does not follow the performance event numbering scheme of previous MIPS > cores. All performance counters (both odd and even) are capable of > counting any of the available events. > > Fixes: 4e88a8621301 ("MIPS: Add cases for CPU_I6400") Thanks, applied. Ralf