On 2016-05-16 19:48, Sergei Shtylyov wrote:
> Hello.
>
> On 05/15/2016 02:32 PM, Felix Fietkau wrote:
>
>> ath79_ddr_pci_win_base has the type void __iomem *, so register offsets
>> need to be a multiple of 4.
>>
>> Cc: Alban Bedel <albeu@xxxxxxx>
>> Fixes: 24b0e3e84fbf ("MIPS: ath79: Improve the DDR controller interface")
>> Signed-off-by: Felix Fietkau <nbd@xxxxxxxx>
>> ---
>> arch/mips/ath79/common.c | 16 ++++++++--------
>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/mips/ath79/common.c b/arch/mips/ath79/common.c
>> index 84d4502..5e26fd8 100644
>> --- a/arch/mips/ath79/common.c
>> +++ b/arch/mips/ath79/common.c
>> @@ -76,14 +76,14 @@ void ath79_ddr_set_pci_windows(void)
>> {
>> BUG_ON(!ath79_ddr_pci_win_base);
>>
>> - __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0);
>> - __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 1);
>> - __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 2);
>> - __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 3);
>> - __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 4);
>> - __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 5);
>> - __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 6);
>> - __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 7);
>> + __raw_writel(AR71XX_PCI_WIN0_OFFS, ath79_ddr_pci_win_base + 0x0);
>> + __raw_writel(AR71XX_PCI_WIN1_OFFS, ath79_ddr_pci_win_base + 0x4);
>> + __raw_writel(AR71XX_PCI_WIN2_OFFS, ath79_ddr_pci_win_base + 0x8);
>> + __raw_writel(AR71XX_PCI_WIN3_OFFS, ath79_ddr_pci_win_base + 0xc);
>> + __raw_writel(AR71XX_PCI_WIN4_OFFS, ath79_ddr_pci_win_base + 0x10);
>> + __raw_writel(AR71XX_PCI_WIN5_OFFS, ath79_ddr_pci_win_base + 0x14);
>> + __raw_writel(AR71XX_PCI_WIN6_OFFS, ath79_ddr_pci_win_base + 0x18);
>> + __raw_writel(AR71XX_PCI_WIN7_OFFS, ath79_ddr_pci_win_base + 0x20);
>
> Maybe 0x1c?
Oops, you're right.
- Felix
