On Fri, Mar 4, 2016 at 4:28 PM, Govindraj Raja
<Govindraj.Raja@xxxxxxxxxx> wrote:
> mfio 84 to 89 are described wrongly, fix it to describe
> the right pin and add them to right pin-mux group.
>
> The correct order is:
> pll1_lock => mips_pll -- MFIO_83
> pll2_lock => audio_pll -- MFIO_84
> pll3_lock => rpu_v_pll -- MFIO_85
> pll4_lock => rpu_l_pll -- MFIO_86
> pll5_lock => sys_pll -- MFIO_87
> pll6_lock => wifi_pll -- MFIO_88
> pll7_lock => bt_pll -- MFIO_89
>
> Fixes: cefc03e5995e("pinctrl: Add Pistachio SoC pin control driver")
> Signed-off-by: Govindraj Raja <Govindraj.Raja@xxxxxxxxxx>
> Cc: linux-gpio@xxxxxxxxxxxxxxx
> Cc: devicetree@xxxxxxxxxxxxxxx
> Cc: Rob Herring <robh+dt@xxxxxxxxxx>
> Cc: Linus Walleij <linus.walleij@xxxxxxxxxx>
> Cc: Andrew Bresticker <abrestic@xxxxxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: James Hartley <James.Hartley@xxxxxxxxxx>
> Cc: <stable@xxxxxxxxxxxxxxx> # v4.2+
Patch applied for fixes with the ACKs and all.
Yours,
Linus Walleij
