Hi Paul,
On 01/03/16 02:37, Paul Burton wrote:
This series fixes up a few issues with our current cache maintenance
code, some specific to highmem & some not. It fixes an issue with icache
corruption seen on the pistachio SoC & Ci40, and icache corruption seen
using highmem on MIPS Malta boards with a P5600 CPU.
Applies atop v4.5-rc6. It would be great to squeeze these in for v4.5,
but I recognise it's quite late in the cycle & this brokenness has been
around for a while so won't object to v4.6.
Thanks,
Paul
Paul Burton (4):
MIPS: Flush dcache for flush_kernel_dcache_page
MIPS: Flush highmem pages in __flush_dcache_page
MIPS: Handle highmem pages in __update_cache
MIPS: Sync icache & dcache in set_pte_at
arch/mips/include/asm/cacheflush.h | 7 +------
arch/mips/include/asm/pgtable.h | 26 +++++++++++++++++++-----
arch/mips/mm/cache.c | 41 +++++++++++++++++++-------------------
3 files changed, 43 insertions(+), 31 deletions(-)
I tested this patchset on a Ci20 (using highmem) and I can successfully
boot to userland from an rfs on NAND, which I couldn't do before.
Tested-by: Harvey Hunt <harvey.hunt@xxxxxxxxxx>
Thanks,
Harvey
