On 02/13/2016 10:58 PM, Antony Pavlov wrote: > From: Weijie Gao <hackpascal@xxxxxxxxx> > > According to the AR7242 datasheet section 2.8, AR724X CPUs use a 40MHz > input clock as the REF_CLK instead of 5MHz. Can't the AR71xx also use 25MHz clock source ? > The correct CPU PLL calculation procedure is as follows: > CPU_PLL = (FB * REF_CLK) / REF_DIV / 2. [...]
