On Mon, Jul 13, 2015 at 05:12:44PM +0100, Paul Burton wrote:
> After writing the appropriate mask to the cop0 PageMask register, read
> the register back & check it matches what we want. If it doesn't then
> the MMU does not support the page size the kernel is configured for and
> we're better off bailing than continuing to do odd things with TLB
> exceptions.
>
> Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
> ---
Hi Ralf,
This patch is marked as accepted in patchwork[1] but is not present in
upstream. Did you lose it somehow? Could you please merge it?
Thanks,
Paul
[1] http://patchwork.linux-mips.org/patch/10691/
> arch/mips/mm/tlb-r4k.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
> index 08318ec..4330315 100644
> --- a/arch/mips/mm/tlb-r4k.c
> +++ b/arch/mips/mm/tlb-r4k.c
> @@ -19,6 +19,7 @@
> #include <asm/cpu.h>
> #include <asm/cpu-type.h>
> #include <asm/bootinfo.h>
> +#include <asm/hazards.h>
> #include <asm/mmu_context.h>
> #include <asm/pgtable.h>
> #include <asm/tlb.h>
> @@ -486,6 +487,10 @@ static void r4k_tlb_configure(void)
> * be set to fixed-size pages.
> */
> write_c0_pagemask(PM_DEFAULT_MASK);
> + back_to_back_c0_hazard();
> + if (read_c0_pagemask() != PM_DEFAULT_MASK)
> + panic("MMU doesn't support PAGE_SIZE=0x%lx", PAGE_SIZE);
> +
> write_c0_wired(0);
> if (current_cpu_type() == CPU_R10000 ||
> current_cpu_type() == CPU_R12000 ||
> --
> 2.4.5
>
