[PATCH 0/2] MIPS: Support more than 32 CPUs on OCTEON

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From: David Daney <david.daney@xxxxxxxxxx>

OCTEON systems can support 2-node NUMA configurations with 48 CPUs per
node.  The first step to handling these systems is to extend the
coremask information passed from the bootloader.  Internally to the
kernel we carry a mask capable of holding 1024 CPUs.  The bootloader
structure version is probed at runtime to populate the internal mask.
This in turn is used to initialize the SMP structures.

David Daney (2):
  MIPS: OCTEON: Remove dead code from cvmx-sysinfo.
  MIPS: OCTEON: Extend number of supported CPUs past 32

 arch/mips/cavium-octeon/executive/cvmx-sysinfo.c | 72 ++-----------------
 arch/mips/cavium-octeon/setup.c                  | 19 ++++-
 arch/mips/cavium-octeon/smp.c                    |  4 +-
 arch/mips/include/asm/octeon/cvmx-bootinfo.h     | 14 +++-
 arch/mips/include/asm/octeon/cvmx-coremask.h     | 89 ++++++++++++++++++++++++
 arch/mips/include/asm/octeon/cvmx-sysinfo.h      | 37 ++--------
 6 files changed, 130 insertions(+), 105 deletions(-)
 create mode 100644 arch/mips/include/asm/octeon/cvmx-coremask.h

-- 
1.7.11.7





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