[PATCH 2/2] MIPS: Loongson-3: Fix SMP_ASK_C0COUNT IPI handler

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When Core-0 handle SMP_ASK_C0COUNT IPI, we should make other cores to
see the result as soon as possible (especially when Store-Fill-Buffer
is enabled). Otherwise, C0_Count syncronization makes no sense.

Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx>
---
 arch/mips/loongson64/loongson-3/smp.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/mips/loongson64/loongson-3/smp.c b/arch/mips/loongson64/loongson-3/smp.c
index 1a4738a..38c775b 100644
--- a/arch/mips/loongson64/loongson-3/smp.c
+++ b/arch/mips/loongson64/loongson-3/smp.c
@@ -277,6 +277,7 @@ void loongson3_ipi_interrupt(struct pt_regs *regs)
 		c0count = read_c0_count();
 		for (i = 1; i < num_possible_cpus(); i++)
 			per_cpu(core0_c0count, i) = c0count;
+		__wbflush(); /* Let others see the result ASAP */
 	}
 }
 
-- 
2.4.6








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