Resets of the EG20T MAC on the MIPS Boston development board take longer than the 1000 loops that pch_gbe_wait_clr_bit was performing. Bump up the number of loops. Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx> --- drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index f2a9a38..f650f45 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c @@ -321,7 +321,7 @@ static void pch_gbe_wait_clr_bit(void *reg, u32 bit) u32 tmp; /* wait busy */ - tmp = 1000; + tmp = 10000; while ((ioread32(reg) & bit) && --tmp) cpu_relax(); if (!tmp) -- 2.6.2
