On 07/14/2015 09:35 AM, Paul Burton wrote: > On Tue, Jul 14, 2015 at 09:30:19AM +0100, Paul Burton wrote: >> On Tue, Jul 14, 2015 at 09:14:12AM +0100, Markos Chandras wrote: >>> Previously, the CM accessors were only accessing CM registers as u32 >>> types instead of using the native CM register with. However, newer CMs >>> may actually be 64-bit on MIPS64 cores. Fortunately, current 64-bit CMs >>> (CM3) hold all the useful configuration bits in the lower half of the >>> 64-bit registers (at least most of them) so they can still be accessed >>> using the current 32-bit accessors. >>> >>> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx> >>> Cc: Jason Cooper <jason@xxxxxxxxxxxxxx> >>> Cc: Andrew Bresticker <abrestic@xxxxxxxxxxxx> >>> Cc: Paul Burton <paul.burton@xxxxxxxxxx> >>> Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx> >>> --- >>> Changes since v1 >>> - Use 32-bit CM I/O on 32-bit kernels >> >> A concern I have, but haven't yet drank enough coffee to think through >> fully, is whether this will work on big endian systems. These are 64b >> addresses and you're writing 32b to their addresses which I suspect may >> go horribly wrong. > > Should be: > > "These are 64b registers and you're writing 32b to their addresses" > > Apparently I haven't drunk enouugh coffee to formulate sentences yet > either ;) > > Thanks, > Paul > The HW team told me that the CM regs can be accessed in LE-pair format even on big-endian cores in the sense that bit0 of a 64-bit CM reg will always be on the lower address. I have never tested that really. -- markos
