bcsr_csc_handler() is a cascading interrupt handler. It has a disable_irq_nosync()/enable_irq() pair around the generic_handle_irq() call. The value of this disable/enable is zero because its a complete noop: disable_irq_nosync() merily increments the disable count without actually masking the interrupt. enable_irq() soleley decrements the disable count without touching the interrupt chip. The interrupt cannot arrive again because the complete call chain runs with interrupts disabled. Remove it. Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> Cc: linux-mips@xxxxxxxxxxxxxx --- arch/mips/alchemy/devboards/bcsr.c | 2 -- 1 file changed, 2 deletions(-) Index: tip/arch/mips/alchemy/devboards/bcsr.c =================================================================== --- tip.orig/arch/mips/alchemy/devboards/bcsr.c +++ tip/arch/mips/alchemy/devboards/bcsr.c @@ -89,9 +89,7 @@ static void bcsr_csc_handler(unsigned in { unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); - disable_irq_nosync(irq); generic_handle_irq(bcsr_csc_base + __ffs(bisr)); - enable_irq(irq); } static void bcsr_irq_mask(struct irq_data *d)