Hi Paul,
On 24/04/15 14:17, Paul Burton wrote:
> When probining the interrupt controller, register an IRQ domain such
probining?
Cheers
James
> that the interrupts can be translated by devicetree code & thus used
> from devicetree.
>
> Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
> Cc: Lars-Peter Clausen <lars@xxxxxxxxxx>
> Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> Cc: Jason Cooper <jason@xxxxxxxxxxxxxx>
> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> ---
> Changes in v4:
> - None.
>
> Changes in v3:
> - Rebase.
>
> Changes in v2:
> - None.
> ---
> arch/mips/jz4740/irq.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/mips/jz4740/irq.c b/arch/mips/jz4740/irq.c
> index ed51915..ddcf78a 100644
> --- a/arch/mips/jz4740/irq.c
> +++ b/arch/mips/jz4740/irq.c
> @@ -85,6 +85,7 @@ static int __init jz4740_intc_of_init(struct device_node *node,
> {
> struct irq_chip_generic *gc;
> struct irq_chip_type *ct;
> + struct irq_domain *domain;
> int parent_irq;
>
> parent_irq = irq_of_parse_and_map(node, 0);
> @@ -113,6 +114,11 @@ static int __init jz4740_intc_of_init(struct device_node *node,
>
> irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
>
> + domain = irq_domain_add_legacy(node, num_chips * 32, JZ4740_IRQ_BASE, 0,
> + &irq_domain_simple_ops, NULL);
> + if (!domain)
> + pr_warn("unable to register IRQ domain\n");
> +
> setup_irq(parent_irq, &jz4740_cascade_action);
> return 0;
> }
>
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