Re: [PATCH 47/48] MIPS: Respect the ISA level in FCSR handling

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On Tue, 7 Apr 2015, Ralf Baechle wrote:

> > Index: linux/arch/mips/include/asm/fpu.h
> > ===================================================================
> > --- linux.orig/arch/mips/include/asm/fpu.h	2015-04-02 20:18:47.499480000 +0100
> > +++ linux/arch/mips/include/asm/fpu.h	2015-04-02 20:27:59.745241000 +0100
> > @@ -14,6 +14,7 @@
> >  #include <linux/thread_info.h>
> >  #include <linux/bitops.h>
> >  
> > +#include <asm/current.h>
> >  #include <asm/mipsregs.h>
> >  #include <asm/cpu.h>
> >  #include <asm/cpu-features.h>
> 
> This is adding a 2nd inclusion of <asm/current.h>.  Will fix that.

 Thanks!  I resisted the temptation to include changes to sort inclusions 
with this series or it would risk becoming an ever going effort.  Though 
it would have avoided an oversight like this.

  Maciej





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