On Sat, 4 Apr 2015, Sergei Shtylyov wrote:
> > + if (MIPSInst_RD(ir) == FPCREG_CSR) {
> > + value = ctx->fcr31;
> > + pr_debug("%p gpr[%d]<-csr=%08x\n",
> > + (void *)xcp->cp0_epc,
> > + MIPSInst_RT(ir), value);
> > + } else if (MIPSInst_RD(ir) == FPCREG_RID)
> > + value = 0;
> > + else
> > + value = 0;
>
> CodingStyle: all arms of the *if* statement shouyld have {} if at leats one
> has them.
>
> > + if (MIPSInst_RT(ir))
> > + xcp->regs[MIPSInst_RT(ir)] = value;
> > +}
> > +
> > +/*
> > + * Emulate a CTC1 instruction.
> > + */
> > +static inline void cop1_ctc(struct pt_regs *xcp, struct mips_fpu_struct
> > *ctx,
> > + mips_instruction ir)
> > +{
> > + u32 value;
> > +
> > + if (MIPSInst_RT(ir) == 0)
> > + value = 0;
> > + else
> > + value = xcp->regs[MIPSInst_RT(ir)];
> > +
> > + /* we only have one writable control reg
> > + */
>
> This comment would fit on a single line.
Thanks for your comments.
These patches move lots of preexisting code around, in some cases copying
preexiting problems. These problems are addressed as code is updated by
later changes, so please have a look there too before pointing out issues.
If I missed anything and a problem remains in code being poked at after
all the changes have been applied, then please do let me know, I'll
correct it.
Thanks for your assistance with keeping our code clean!
Maciej
