Hi Paolo, Marcelo,
Here is the MIPS guest FPU & SIMD (MSA) work. I've based this on
kvm/queue as of Friday, and it also pulls in some MIPS FP/MSA fixes from
a branch in Ralf's MIPS tree. Hope that's okay.
Please pull
Thanks
James
The following changes since commit b3a2a9076d3149781c8622d6a98a51045ff946e4:
KVM: nVMX: Add support for rdtscp (2015-03-26 22:33:48 -0300)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/kvm-mips.git tags/kvm_mips_20150327
for you to fetch changes up to d952bd070f79b6dcbad52c03dbc41cbc8ba086c8:
MIPS: KVM: Wire up MSA capability (2015-03-27 21:25:22 +0000)
----------------------------------------------------------------
MIPS KVM Guest FPU & SIMD (MSA) Support
Add guest FPU and MIPS SIMD Architecture (MSA) support to MIPS KVM, by
enabling the host FPU/MSA while in guest mode. This adds two new KVM
capabilities, KVM_CAP_MIPS_FPU & KVM_CAP_MIPS_MSA, and supports the 3 FP
register modes (FR=0, FR=1, FRE=1), and 128-bit MSA vector registers,
with lazy FPU/MSA context save and restore.
Some required MIPS FP/MSA fixes are merged in from a branch in the MIPS
tree first.
----------------------------------------------------------------
James Hogan (24):
MIPS: lose_fpu(): Disable FPU when MSA enabled
Revert "MIPS: Don't assume 64-bit FP registers for context switch"
MIPS: MSA: Fix big-endian FPR_IDX implementation
Merge branch '4.1-fp' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr into kvm_mips_queue
MIPS: KVM: Handle MSA Disabled exceptions from guest
MIPS: Clear [MSA]FPE CSR.Cause after notify_die()
MIPS: KVM: Handle TRAP exceptions from guest kernel
MIPS: KVM: Implement PRid CP0 register access
MIPS: KVM: Sort kvm_mips_get_reg() registers
MIPS: KVM: Drop pr_info messages on init/exit
MIPS: KVM: Clean up register definitions a little
MIPS: KVM: Simplify default guest Config registers
MIPS: KVM: Add Config4/5 and writing of Config registers
MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callback
MIPS: KVM: Add base guest FPU support
MIPS: KVM: Emulate FPU bits in COP0 interface
MIPS: KVM: Add FP exception handling
MIPS: KVM: Expose FPU registers
MIPS: KVM: Wire up FPU capability
MIPS: KVM: Add base guest MSA support
MIPS: KVM: Emulate MSA bits in COP0 interface
MIPS: KVM: Add MSA exception handling
MIPS: KVM: Expose MSA registers
MIPS: KVM: Wire up MSA capability
Paul Burton (8):
MIPS: Push .set mips64r* into the functions needing it
MIPS: assume at as source/dest of MSA copy/insert instructions
MIPS: remove MSA macro recursion
MIPS: wrap cfcmsa & ctcmsa accesses for toolchains with MSA support
MIPS: clear MSACSR cause bits when handling MSA FP exception
MIPS: Ensure FCSR cause bits are clear after invoking FPU emulator
MIPS: prevent FP context set via ptrace being discarded
MIPS: disable FPU if the mode is unsupported
Documentation/virtual/kvm/api.txt | 54 +++++
arch/mips/include/asm/asmmacro-32.h | 128 +++++-----
arch/mips/include/asm/asmmacro.h | 218 ++++++++++-------
arch/mips/include/asm/fpu.h | 20 +-
arch/mips/include/asm/kdebug.h | 3 +-
arch/mips/include/asm/kvm_host.h | 125 +++++++---
arch/mips/include/asm/processor.h | 2 +-
arch/mips/include/uapi/asm/kvm.h | 160 +++++++-----
arch/mips/kernel/asm-offsets.c | 105 +++-----
arch/mips/kernel/genex.S | 15 +-
arch/mips/kernel/ptrace.c | 30 ++-
arch/mips/kernel/r4k_fpu.S | 2 +-
arch/mips/kernel/traps.c | 35 ++-
arch/mips/kvm/Makefile | 8 +-
arch/mips/kvm/emulate.c | 332 ++++++++++++++++++++++++-
arch/mips/kvm/fpu.S | 122 ++++++++++
arch/mips/kvm/locore.S | 38 +++
arch/mips/kvm/mips.c | 472 +++++++++++++++++++++++++++++++++++-
arch/mips/kvm/msa.S | 161 ++++++++++++
arch/mips/kvm/stats.c | 4 +
arch/mips/kvm/tlb.c | 6 +
arch/mips/kvm/trap_emul.c | 199 ++++++++++++++-
include/uapi/linux/kvm.h | 2 +
23 files changed, 1876 insertions(+), 365 deletions(-)
create mode 100644 arch/mips/kvm/fpu.S
create mode 100644 arch/mips/kvm/msa.S
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