Hi, On Fri, Mar 13, 2015 at 05:34:54PM +0000, Paul Martin wrote: > Even though the bootloader may have switched the main CPU core to > LE mode the other CPU cores may start with endianness dictated by > how their pins are strapped on the board. > --- > .../asm/mach-cavium-octeon/kernel-entry-init.h | 137 ++++++++++++++++++++- > 1 file changed, 136 insertions(+), 1 deletion(-) > > diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h > index cf92fe7..b377044 100644 > --- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h > +++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h > @@ -3,7 +3,7 @@ > * License. See the file "COPYING" in the main directory of this archive > * for more details. > * > - * Copyright (C) 2005-2008 Cavium Networks, Inc > + * Copyright (C) 2005-2012 Cavium, Inc I don't think you should touch these... > */ > #ifndef __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H > #define __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H > @@ -26,6 +26,141 @@ > # a3 = address of boot descriptor block > .set push > .set arch=octeon > +#ifdef CONFIG_HOTPLUG_CPU > + b 7f > + nop > + > +FEXPORT(octeon_hotplug_entry) > + move a0, zero > + move a1, zero > + move a2, zero > + move a3, zero > +7: > +#endif /* CONFIG_HOTPLUG_CPU */ > +#ifdef CONFIG_CPU_LITTLE_ENDIAN No tabs. > + .set push > + .set noreorder > + /* Hotpplugged CPUs enter in Big-Endian mode, switch here to LE */ ^^ Typo. > + dmfc0 v0, CP0_CVMCTL_REG > + nop > + ori v0, v0, 2 > + nop > + dmtc0 v0, CP0_CVMCTL_REG /* little-endian */ > + nop > + synci 0($0) > + .set pop > +#endif /* CONFIG_CPU_LITTLE_ENDIAN */ > + mfc0 v0, CP0_STATUS > + /* Force 64-bit addressing enabled */ > + ori v0, v0, (ST0_UX | ST0_SX | ST0_KX) > + mtc0 v0, CP0_STATUS > + > + # Clear the TLB. > + mfc0 v0, $16, 1 # Config1 > + dsrl v0, v0, 25 > + andi v0, v0, 0x3f > + mfc0 v1, $16, 3 # Config3 > + bgez v1, 1f > + mfc0 v1, $16, 4 # Config4 > + andi v1, 0x7f > + dsll v1, 6 > + or v0, v0, v1 > +1: # Number of TLBs in v0 > + > + dmtc0 zero, $2, 0 # EntryLo0 > + dmtc0 zero, $3, 0 # EntryLo1 > + dmtc0 zero, $5, 0 # PageMask > + dla t0, 0xffffffff90000000 > +10: > + dmtc0 t0, $10, 0 # EntryHi > + tlbp > + mfc0 t1, $0, 0 # Index > + bltz t1, 1f > + tlbr > + dmtc0 zero, $2, 0 # EntryLo0 > + dmtc0 zero, $3, 0 # EntryLo1 > + dmtc0 zero, $5, 0 # PageMask > + tlbwi # Make it a 'normal' sized page > + daddiu t0, t0, 8192 > + b 10b > +1: > + mtc0 v0, $0, 0 # Index > + tlbwi > + .set noreorder > + bne v0, zero, 10b > + addiu v0, v0, -1 > + .set reorder > + > + mtc0 zero, $0, 0 # Index > + dmtc0 zero, $10, 0 # EntryHi > + > +#ifdef CONFIG_MAPPED_KERNEL Mainline kernel does not support MAPPED_KERNEL on OCTEON, so you should delete all this code. A.