From: Paul Burton <paul.burton@xxxxxxxxxx> With the jz4780, Ingenic switched to use a different vendor ID in the coprocessor 0 PRID register (whilst keeping the product ID & revision the same as the jz4740 & jz4770...). Add a definition for the new vendor ID & handle it in the same way as the older one. Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx> Cc: Lars-Peter Clausen <lars@xxxxxxxxxx> --- arch/mips/include/asm/cpu.h | 1 + arch/mips/kernel/cpu-probe.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 33866fc..ab00d3b 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -43,6 +43,7 @@ #define PRID_COMP_NETLOGIC 0x0c0000 #define PRID_COMP_CAVIUM 0x0d0000 #define PRID_COMP_INGENIC 0xd00000 +#define PRID_COMP_INGENIC_4780 0xe10000 /* * Assigned Processor ID (implementation) values for bits 15:8 of the PRId diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5342674..ca98c4a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1313,6 +1313,7 @@ void cpu_probe(void) cpu_probe_cavium(c, cpu); break; case PRID_COMP_INGENIC: + case PRID_COMP_INGENIC_4780: cpu_probe_ingenic(c, cpu); break; case PRID_COMP_NETLOGIC: -- 1.9.1
