From: Joshua Kinard <kumba@xxxxxxxxxx>
This patch splits the old R10000 definitions so that the R10000_LLSC_WAR can be
disabled and -mno-fix-r10000 passed to CFLAGS for systems running R12000 CPUs
and greater. This allows the kernel to build without branch-likely
instructions, which are considered deprecated in current MIPS implementations.
Only R10000 systems with R2.6 and lower CPUs require branch-likely to work
around a known hardware errata item.
Verified on both an SGI Onyx2 and an SGI Octane.
Signed-off-by: Joshua Kinard <kumba@xxxxxxxxxx>
---
arch/mips/Kconfig | 20 ++++++++++++++++++--
arch/mips/Makefile | 3 +++
arch/mips/include/asm/cpu-type.h | 2 ++
arch/mips/include/asm/hazards.h | 3 ++-
arch/mips/include/asm/mach-ip27/war.h | 7 ++++++-
arch/mips/include/asm/module.h | 2 ++
arch/mips/oprofile/Makefile | 1 +
arch/mips/oprofile/op_model_mipsxx.c | 5 ++++-
arch/mips/sgi-ip27/Platform | 15 ++++++++-------
arch/mips/sgi-ip32/Platform | 2 ++
drivers/video/fbdev/gbefb.c | 2 +-
11 files changed, 49 insertions(+), 13 deletions(-)
Only changed bit is catching a few missed spots where the R10K needed to be
differentiated from R12K and up. I think I got them all this time.
This patch will conflict slightly with the R16000 patch in the
arch/mips/oprofile/op_model_mipsxx.c file. Not much I can do about that.
linux-mips-split-r10k-family.patch
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 73983e1..af4b282 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -551,6 +551,7 @@ config SGI_IP27
select HW_HAS_PCI
select NR_CPUS_DEFAULT_64
select SYS_HAS_CPU_R10000
+ select SYS_HAS_CPU_R12K_R14K_R16K
select SYS_SUPPORTS_64BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_NUMA
@@ -612,6 +613,7 @@ config SGI_IP32
select RM7000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_HAS_CPU_R10000 if BROKEN
+ select SYS_HAS_CPU_R12K_R14K_R16K if BROKEN
select SYS_HAS_CPU_RM7000
select SYS_HAS_CPU_NEVADA
select SYS_SUPPORTS_64BIT_KERNEL
@@ -1456,7 +1458,18 @@ config CPU_R10000
select CPU_SUPPORTS_HIGHMEM
select CPU_SUPPORTS_HUGEPAGES
help
- MIPS Technologies R10000-series processors.
+ MIPS Technologies R10000 processor.
+
+config CPU_R12K_R14K_R16K
+ bool "R12k/R14k/R16k"
+ depends on SYS_HAS_CPU_R12K_R14K_R16K
+ select CPU_HAS_PREFETCH
+ select CPU_SUPPORTS_32BIT_KERNEL
+ select CPU_SUPPORTS_64BIT_KERNEL
+ select CPU_SUPPORTS_HIGHMEM
+ select CPU_SUPPORTS_HUGEPAGES
+ help
+ MIPS Technologies R12k/R14k/R16k-series processors.
config CPU_RM7000
bool "RM7000"
@@ -1704,6 +1717,9 @@ config SYS_HAS_CPU_R8000
config SYS_HAS_CPU_R10000
bool
+config SYS_HAS_CPU_R12K_R14K_R16K
+ bool
+
config SYS_HAS_CPU_RM7000
bool
@@ -2283,7 +2299,7 @@ config NODES_SHIFT
config HW_PERF_EVENTS
bool "Enable hardware performance counter support for perf events"
- depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
+ depends on PERF_EVENTS && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_R12K_R14K_R16K || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP)
default y
help
Enable hardware performance counter support for perf events. If
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 37fce70..abccbb2 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -176,6 +176,9 @@ cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-mno-mips3d)
cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap
cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \
-Wa,--trap
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += $(call cc-option,-march=r12000,-march=r8000) \
+ $(call cc-option,-mno-fix-r10000,) \
+ -Wa,--trap
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += $(call cc-option,-march=octeon) -Wa,--trap
ifeq (,$(findstring march=octeon, $(cflags-$(CONFIG_CPU_CAVIUM_OCTEON))))
cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index b4e2bd8..73c9f51 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -148,6 +148,8 @@ static inline int __pure __get_cpu_type(const int cpu_type)
#ifdef CONFIG_SYS_HAS_CPU_R10000
case CPU_R10000:
+#endif
+#ifdef CONFIG_SYS_HAS_CPU_R12K_R14K_R16K
case CPU_R12000:
case CPU_R14000:
#endif
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index e3ee92d..0b565e5 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -138,7 +138,8 @@ do { \
#elif defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
defined(CONFIG_CPU_LOONGSON2) || defined(CONFIG_CPU_R10000) || \
- defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_XLR)
+ defined(CONFIG_CPU_R12K_R14K_R16K) || defined(CONFIG_CPU_R5500) || \
+ defined(CONFIG_CPU_XLR)
/*
* R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
diff --git a/arch/mips/include/asm/mach-ip27/war.h b/arch/mips/include/asm/mach-ip27/war.h
index 4ee0e4b..e901a81 100644
--- a/arch/mips/include/asm/mach-ip27/war.h
+++ b/arch/mips/include/asm/mach-ip27/war.h
@@ -18,7 +18,12 @@
#define MIPS_CACHE_SYNC_WAR 0
#define TX49XX_ICACHE_INDEX_INV_WAR 0
#define ICACHE_REFILLS_WORKAROUND_WAR 0
-#define R10000_LLSC_WAR 1
#define MIPS34K_MISSED_ITLB_WAR 0
+#ifdef CONFIG_CPU_R10000
+#define R10000_LLSC_WAR 1
+#else
+#define R10000_LLSC_WAR 0
+#endif
+
#endif /* __ASM_MIPS_MACH_IP27_WAR_H */
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index 800fe57..394dee4 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -118,6 +118,8 @@ search_module_dbetables(unsigned long addr)
#define MODULE_PROC_FAMILY "R8000 "
#elif defined CONFIG_CPU_R10000
#define MODULE_PROC_FAMILY "R10000 "
+#elif defined CONFIG_CPU_R12K_R14K_R16K
+#define MODULE_PROC_FAMILY "R12K/R14K/R16K "
#elif defined CONFIG_CPU_RM7000
#define MODULE_PROC_FAMILY "RM7000 "
#elif defined CONFIG_CPU_SB1
diff --git a/arch/mips/oprofile/Makefile b/arch/mips/oprofile/Makefile
index 070afdb..050a44e 100644
--- a/arch/mips/oprofile/Makefile
+++ b/arch/mips/oprofile/Makefile
@@ -11,6 +11,7 @@ oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
oprofile-$(CONFIG_CPU_MIPS32) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_MIPS64) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_R10000) += op_model_mipsxx.o
+oprofile-$(CONFIG_CPU_R12K_R14K_R16K) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_SB1) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_XLR) += op_model_mipsxx.o
oprofile-$(CONFIG_CPU_LOONGSON2) += op_model_loongson2.o
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index 01f721a..d3a2b94 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -407,10 +407,13 @@ static int __init mipsxx_init(void)
break;
case CPU_R12000:
- case CPU_R14000:
op_model_mipsxx_ops.cpu_type = "mips/r12000";
break;
+ case CPU_R14000:
+ op_model_mipsxx_ops.cpu_type = "mips/r14000";
+ break;
+
case CPU_SB1:
case CPU_SB1A:
op_model_mipsxx_ops.cpu_type = "mips/sb1";
diff --git a/arch/mips/sgi-ip27/Platform b/arch/mips/sgi-ip27/Platform
index 1fb9c2e..4ad7060 100644
--- a/arch/mips/sgi-ip27/Platform
+++ b/arch/mips/sgi-ip27/Platform
@@ -6,14 +6,15 @@
# be 16kb aligned or the handling of the current variable will break.
#
ifdef CONFIG_SGI_IP27
-platform-$(CONFIG_SGI_IP27) += sgi-ip27/
-cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
+platform-$(CONFIG_SGI_IP27) += sgi-ip27/
+cflags-$(CONFIG_SGI_IP27) += -I$(srctree)/arch/mips/include/asm/mach-ip27
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += -mno-fix-r10000
ifdef CONFIG_MAPPED_KERNEL
-load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
-OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
-dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
+load-$(CONFIG_SGI_IP27) += 0xc00000004001c000
+OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000
+dataoffset-$(CONFIG_SGI_IP27) += 0x01000000
else
-load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
-OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
+load-$(CONFIG_SGI_IP27) += 0xa80000000001c000
+OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000
endif
endif
diff --git a/arch/mips/sgi-ip32/Platform b/arch/mips/sgi-ip32/Platform
index 0fea556..5899305 100644
--- a/arch/mips/sgi-ip32/Platform
+++ b/arch/mips/sgi-ip32/Platform
@@ -8,4 +8,6 @@
#
platform-$(CONFIG_SGI_IP32) += sgi-ip32/
cflags-$(CONFIG_SGI_IP32) += -I$(srctree)/arch/mips/include/asm/mach-ip32
+cflags-$(CONFIG_CPU_R10000) += -mr10k-cache-barrier=load-store
+cflags-$(CONFIG_CPU_R12K_R14K_R16K) += -mno-fix-r10000 -mr10k-cache-barrier=load-store
load-$(CONFIG_SGI_IP32) += 0xffffffff80004000
diff --git a/drivers/video/fbdev/gbefb.c b/drivers/video/fbdev/gbefb.c
index 6d9ef39..c5dc991 100644
--- a/drivers/video/fbdev/gbefb.c
+++ b/drivers/video/fbdev/gbefb.c
@@ -47,7 +47,7 @@ struct gbefb_par {
/* macro for fastest write-though access to the framebuffer */
#ifdef CONFIG_MIPS
-#ifdef CONFIG_CPU_R10000
+#if defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_R12K_R14K_R16K)
#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_UNCACHED_ACCELERATED)
#else
#define pgprot_fb(_prot) (((_prot) & (~_CACHE_MASK)) | _CACHE_CACHABLE_NO_WA)
