On Fri, 16 Jan 2015, Markos Chandras wrote: > MIPS R6 removed the addi instruction so we replace it with addiu. > > Cc: Paul Burton <paul.burton@xxxxxxxxxx> > Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx> > --- > arch/mips/kernel/cps-vec.S | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S > index 0384b05ab5a0..55b759a0019e 100644 > --- a/arch/mips/kernel/cps-vec.S > +++ b/arch/mips/kernel/cps-vec.S > @@ -99,11 +99,11 @@ not_nmi: > xori t2, t1, 0x7 > beqz t2, 1f > li t3, 32 > - addi t1, t1, 1 > + addiu t1, t1, 1 > sllv t1, t3, t1 > 1: /* At this point t1 == I-cache sets per way */ > _EXT t2, v0, MIPS_CONF1_IA_SHF, MIPS_CONF1_IA_SZ > - addi t2, t2, 1 > + addiu t2, t2, 1 > mul t1, t1, t0 > mul t1, t1, t2 > This looks like another case of an unrelated ADDIU vs ADDI bug, there's nothing in this code apparent to me that would make it want trap on integer overflows. This should go in separately IMHO, not as a part of R6 changes, and right away, including all the relevant release branches. Of course an updated description would do, I'll mark such an update as reviewed by me to speed up processing. Maciej
