On Mon, Jan 19, 2015 at 1:16 PM, David Daney <ddaney.cavm@xxxxxxxxx> wrote: > On 01/19/2015 07:43 AM, Mark Rutland wrote: >> >> On Mon, Jan 19, 2015 at 03:23:58PM +0000, Aleksey Makarov wrote: >>> >>> The OCTEON SATA controller is currently found on cn71XX devices. [...] >>> + >>> + /* Set a good dma_mask */ >>> + pdev->dev.coherent_dma_mask = DMA_BIT_MASK(64); >>> + pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask; >> >> >> I thought a dma-ranges property in the DT could be used to set up the >> DMA mask appropriately? > > > The DT contains no dma-ranges property, and we know a priori, that it should > be 64-bits. Neither this code nor dma-ranges should be necessary. The AHCI core code will set the mask to 32 or 64 bits based on the AHCI Capabilities register. Rob
